Recently, domestic companies have achieved process breakthroughs in super junction SiC MOSFETs, while overseas giants have planned to roll out mass production between 2027 and 2031. A technological race over next-generation SiC device structures is now underway.
However, for the commercialization of super junction SiC MOSFETs, challenges remain in manufacturing processes, charge balance control, reliability verification, and mass production yield.
To gain an in-depth understanding of the actual development progress and latest technical solutions for super junction SiC MOSFETs, "Experts Talk 3rd-Gen Semi" has specially organized this exclusive interview. It invites three core industry chain companies—Aoshite, Oriental Semiconductor, and Tianyu Semiconductor—to engage in a dialogue, providing forward-looking insights and decision-making references for the high-quality development of the industry.
1. Over 10 SiC Companies Deploy Super Junction Devices, with Mass Production Expected in the Next Two Years
It is well known that breakdown voltage and on-resistance are the core metrics for SiC MOSFETs. However, the traditional SiC MOSFET structure faces an unavoidable trade-off: a higher breakdown voltage requires a thicker drift region, which in turn increases the on-resistance.
In this context, super junction SiC MOSFETs have emerged as a critical direction for next-generation high-performance SiC power devices. Unlike planar gate or trench gate technologies, which primarily focus on adjusting the gate structure, super junction technology innovates the drift region beneath the gate.
Simply put, the super junction structure forms alternating P/N charge compensation regions within the drift region. This allows for an increased doping concentration without compromising the breakdown voltage, thereby significantly reducing the on-resistance and fully leveraging the performance advantages of SiC MOSFETs.
In recent years, super junction technology has transitioned from laboratory research to industrial implementation, with multiple companies launching super junction SiC MOSFET products or technical prototypes. These advancements indicate that the introduction of super junction technology is driving a continuous reduction in specific on-resistance.
Meanwhile, industry chain companies such as Aoshite, Oriental Semiconductor, Bosch, and Tianyu Semiconductor are accelerating their deployments to advance the R&D and implementation of super junction technology. Notably, several companies have defined clear mass production timelines: Infineon expects its 1200V SiC TSJ power devices to enter mass production in 2027; Bosch plans to achieve mass production by 2031; and Yaoxin Micro is collaborating with United Nova Technology (UNT) to advance mass production, with its initial customers targeting the AIDC sector.
At the current stage, super junction SiC devices are on the eve of commercialization. Tianyu Semiconductor stated that they are currently collaborating with multiple leading domestic and international customers to advance the development of SiC super junction devices. They have completed multiple rounds of process iteration, with epitaxial metrics continuously optimized. However, the industry as a whole remains in the sample R&D and verification phase. While a few companies have released samples, large-scale mass production has not yet been realized.
Based on industry trends, Aoshite predicts that over the next three to five years, as demand for high-voltage energy storage and industrial power supplies is released, super junction SiC MOSFETs will gradually enter small-scale commercialization. Achieving true large-scale mass production, however, still depends on whether wafer manufacturing capabilities, process maturity, and cost efficiency can reach a new level.
Oriental Semiconductor predicts that super junction SiC MOSFETs will enter mass production between 2027 and 2028, with volume scaling up from 2028 to 2030. The pace will primarily depend on yield ramp-up, the speed of cost reduction for 8-inch substrates and epitaxy, and the validation cycles of major customers in the automotive and data center sectors.
As the commercialization of super junction SiC MOSFETs advances, the industry is also monitoring whether they will impact planar or trench SiC MOSFETs of the same specifications. The three interviewed companies provided clear perspectives on this matter.
Aoshite believes that the super junction structure is not intended to "replace" planar or trench structures. More accurately, it represents a crucial stage in the evolution of SiC technology. Each of the three structures has its specific application scenarios; rather than one replacing the others, they will coexist for the long term and evolve progressively.
From an application perspective, the degree of commercialization varies across different voltage ratings: in the 650V to 2300V range, existing structures already offer high cost-effectiveness; above 3300V, adopting super junction solutions can yield significant benefits in chip performance, power density, and efficiency, and the application end can also absorb the corresponding process costs.
In terms of timing, in the short term (one to three years), the advantages of the planar structure in automotive, industrial, and power supply applications remain prominent; in the medium term (three to five years), the trench structure is expected to become a key solution for NEVs and high-end applications; in the long term (over five years), super junction technology has the opportunity to penetrate the high-performance market above 1200V. Overall, the market will not rely on a single structure but will adopt the most suitable one for specific application scenarios.
Oriental Semiconductor emphasized that deploying super junction devices has become an industry consensus. A widely shared industry forecast suggests that super junction technology will achieve stable mass production, narrow the price gap to within 1.5 times, and exert genuine competitive pressure around 2029. Until then, planar and trench structures, leveraging their mature yields and cost advantages, will remain the mainstay of the SiC MOSFET market.
Moreover, planar and trench structures are continuously iterating on their own; one structure is not stagnating while waiting to be surpassed by another. Additionally, application scenarios are inherently segmented. For applications that are less sensitive to power density and prioritize cost, reliability, and supply stability, planar SiC MOSFETs will remain relevant for the long term.
Tianyu Semiconductor also believes that in the short term, super junction technology will not pose a significant substitution threat to planar or trench structures, and the market will exhibit a coexistence relationship. In the medium to long term, however, it may lead to a differentiation in the product landscape. Device manufacturers will pursue multiple technological routes in parallel based on the specific requirements for cost, power density, and reliability across different applications, meaning no single route will completely replace another.
2. Confronting Super Junction SiC Process Challenges: Reviewing the Technological Layouts of Three Companies
In terms of performance advantages, super junction SiC certainly has its unique strengths; however, regarding the commercialization process, the industry consensus remains that "product validation is largely complete, but large-scale mass production still requires further verification." Oriental Semiconductor explained that while super junction is a mature technology for silicon-based devices, migrating it to SiC introduces new technical challenges.
Specifically, the process challenges of super junction SiC primarily lie in the trade-offs and optimization of technological routes. Currently, there are two main technological routes for super junction SiC MOSFETs: Multi-EPI (multiple alternating epitaxy) and Deep Trench (deep trench fill epitaxy), each with its own pros and cons.
Regarding these two routes, Oriental Semiconductor noted that the former requires multiple epitaxy and ion implantation steps. In particular, the difficulty of controlling the number, depth, dose, and lattice damage of ion implantation has increased significantly, posing an extreme test for the process platform. The latter tests trench etching and fill processes. While this is already a major challenge for silicon-based super junctions, implementing it on SiC requires extensive Design of Experiments (DOE) validation and debugging to achieve mass production feasibility.
Tianyu Semiconductor, on the other hand, believes that while Multi-EPI offers good reliability, it involves numerous process steps, and multiple epitaxy runs lead to high costs and difficult lithography control. Deep Trench involves fewer process steps and yields a lower specific on-resistance, but controlling the sidewall smoothness, morphology, and high aspect ratio of deep trenches is challenging. Epitaxial filling is prone to void defects, which can affect reliability. Both routes require precise control of P/N charge balance, placing higher demands on epitaxial doping uniformity and defect control.
Aoshite also pointed out that the super junction structure imposes significantly higher requirements on epitaxial growth, ion implantation, and doping control compared to traditional structures. Furthermore, due to SiC's inherent high hardness, wide bandgap, and low diffusion coefficient, silicon-based super junction processes cannot be directly transferred; process routes specifically tailored for SiC must be developed from scratch.
Beyond the choice of process routes, super junction SiC must also address reliability issues. Aoshite revealed that SiC MOSFETs inherently face challenges such as gate oxide reliability, interface state defects, and threshold voltage shift. Since the electric field distribution in a super junction structure is more complex, key validations are required for long-term gate oxide stability, High Temperature Reverse Bias (HTRB), short-circuit withstand capability, and power cycling.
Oriental Semiconductor also agrees that electric field concentration at the P/N pillar interfaces, stability under prolonged high-temperature and high-voltage conditions, and yield ramp-up are all challenges for super junction SiC. In particular, regarding charge balance, the design cannot solely focus on the ideal balance point; it must incorporate a safety margin to accommodate process fluctuations. This heavily tests the synergy between design and process engineering.
Once process-level challenges are addressed, super junction SiC must ultimately face market competition. Aoshite analyzed that the SiC industry is still in the scale-up phase, where wafer and epitaxy costs, along with manufacturing yield, directly determine the final price. Although super junction technology offers superior performance, if increased process complexity fails to drive down costs, it will struggle to replace mature solutions and will have to rely on economies of scale to reduce unit costs.
Confronting these multifaceted challenges in process, reliability, and cost, the industrialization of super junction SiC requires coordinated advancements across materials, devices, and process platforms. Currently, Tianyu Semiconductor, Aoshite, and Oriental Semiconductor have each entered from their respective segments to accelerate R&D and validation deployments.
Focusing on the silicon carbide epitaxy process, Tianyu Semiconductor stated that the core foundation of super junction SiC MOSFETs is high-performance SiC epitaxy. They have broken through key epitaxial processes required for super junction device development, including multi-layer alternating P/N structure epitaxy, high-uniformity thick-film epitaxy, and trench fill epitaxy. They have also built deep technical expertise in both the Multi-EPI and Deep Trench fill routes.
Specifically, the Multi-EPI process has achieved over 10 iterations of process experience; Deep Trench filling has realized void-free trench refills with high in-plane uniformity at aspect ratios ranging from 4:1 to 15:1, primarily applied in semi-super junction and fully super junction devices. Meanwhile, they have jointly conducted tape-out validations with multiple leading device customers, continuously optimizing epitaxial metrics to support the development of super junction device prototypes.
Focusing on silicon carbide device processes, both Aoshite and Oriental Semiconductor are maintaining a steady pace of advancement. Aoshite stated that the company's strategy is "rapid commercialization of mature structures combined with continuous deployment of advanced structures," meaning they will first launch viable products while proactively reserving next-generation technologies. For them, the key is not to bet on a single structure, but to build robust SiC MOSFET platform capabilities, achieve continuous iteration, and launch products that match market demands at various stages.
Oriental Semiconductor also noted that pursuing multiple routes in parallel is an advantage of its Fabless operating model. This approach allows for optimal resource utilization and allocation, leveraging their deep technical expertise in devices and products—maintaining existing revenue and customers with planar and trench SiC, while deploying super junction technology to secure a position in the next generation. This ensures they are not caught off guard by the emergence of new structures, nor do they take undue risks by betting on a single route.
Specifically, Aoshite is primarily building its technical reserves around three goals: "high performance, high reliability, and manufacturability." They believe that the focus of future competition will shift from merely "having a product" to a comprehensive contest of "performance, reliability, and cost."
Regarding the super junction devices themselves, research projects have been initiated on super junction drift region design, charge balance optimization, co-optimization of breakdown voltage and on-resistance, and process window exploration. Aoshite's focus is not on chasing laboratory metrics, but on ensuring future mass production feasibility—the products developed must be truly viable for real-world implementation.
Centered on device structure design and process and reliability systems, Aoshite is continuously advancing projects such as low on-resistance structures, electric field uniformity, gate oxide reliability optimization, and low parasitic parameter design. They are enhancing overall performance through device simulation and process co-optimization. Simultaneously, a comprehensive product system encompassing gate oxide processes, defect control, wafer-level testing, reliability evaluation, and failure analysis is also under development.
On the other hand, Oriental Semiconductor has consistently adhered to a dual-track parallel strategy. In terms of the super junction process itself, their fourth-generation silicon-based super junction has achieved large-scale mass production, while the fifth generation is in the small-batch delivery phase. After more than a decade of mass production iterations, capabilities such as charge balance design, cell optimization, and terminal design have been translated into tangible know-how, rather than remaining purely theoretical.
Furthermore, Oriental Semiconductor's SiC platform now covers planar and trench SiC MOSFETs, SiC JFETs, and super junction SiC MOSFETs. Operating under a Virtual IDM model, they have engaged in deep, long-term collaboration with wafer fabs to develop process platforms, accumulating extensive experience in rapidly translating new structures into manufacturable products. Through close cooperation with customers, they can capture emerging requirements from frontier scenarios such as AI data centers and NEVs in real time, reverse-defining device specifications accordingly to launch products that truly meet market demands.
In summary, after years of development, the application value of SiC MOSFETs has been fully recognized by the market, with accelerated penetration into downstream scenarios such as NEVs, industrial power supplies, and data centers. Today, the emergence of the super junction structure acts as a crucial building block, establishing a new fulcrum for further unleashing performance advantages, and providing new possibilities for expanding market reach and application boundaries.