Suzhou Senwan Electronics, a wafer-level passive component manufacturer, recently completed a Series A funding round of over CNY 100 million. The round was co-led by an optical module industry player and Clory Ventures, with SR Capital participating as a follow-on investor. The funds will be primarily allocated to the technological development of silicon capacitors and the IPD (Integrated Passive Device) platform, capacity expansion, and global market expansion.
One notable aspect of this funding round is the inclusion of an optical module industry player among the lead investors.
| Where the Money Comes From Matters More Than How Much
When evaluating a funding round, the focus should not be solely on the amount, but rather on the source of the capital.
One of the lead investors in Senwan's current round is an optical module industry player. This is not a purely financial investment; it resembles a strategic move to secure a position in the supply chain. However, the exact implication of this positioning depends on the specific motivations of the customer.
One possibility is securing priority supply: as silicon capacitors begin to enter the BOM (Bill of Materials) for 800G/1.6T optical modules, customers want to ensure that capacity and iteration paces align with their own roadmaps. Another possibility is cost reduction: leveraging shareholder status to secure better pricing and customized collaboration, thereby compressing component costs into their gross margin models. A third possibility is defensive positioning: preventing competitors from binding this scarce domestic wafer-level passive component capacity first.
Consider the signal released by "customer-led investment"—the downstream sector highly values this segment.
The internal space of 800G/1.6T optical modules is measured in millimeters, and traditional discrete capacitors are nearing their limits in terms of size and performance. With transient currents in AI chips frequently reaching hundreds of amperes, "insufficient space for capacitors" is becoming a packaging challenge as intractable as "insufficient computing power." Downstream industry leaders using equity to lock in upstream supply demonstrates that silicon capacitors have evolved from a mere trend in presentations to an absolute necessity on production lines.
Clory Ventures (focusing long-term on semiconductors and optoelectronics) co-leading and SR Capital following suit—this combination looks more like a bet on technological depth rather than short-term revenue. Silicon capacitors combined with IPD represent a typically process- and mass-production-intensive track. The IDM (Integrated Device Manufacturer) model implies full in-house capabilities for design, process, and wafer manufacturing, requiring heavy upfront investment and a slow return on investment. The "CNY 100 million-level" Series A is more like a starting gun than a finish line.
| How a Single Capacitor Became a Computing Power Bottleneck
Discussions on AI computing power have long been dominated by GPUs, HBM, and advanced packaging, with few noticing that the power delivery network is becoming a hidden ceiling for system performance.
The logic is not complex: chip power consumption has surged from hundreds of watts to the kilowatt level, with transient currents reaching hundreds of amperes. Under traditional lateral power delivery, the path between the PMIC (Power Management IC) and the main chip is measured in centimeters. Parasitic inductance and resistance cause significant voltage fluctuations under transient loads of hundreds of amperes. The more decoupling capacitors required, the less packaging area is available to accommodate them—this is a structural deadlock that cannot be solved merely by further engineering optimization.
This is where the value of silicon capacitors lies: manufactured using wafer-level processes, they offer order-of-magnitude advantages over traditional MLCCs (Multi-Layer Ceramic Capacitors) in metrics such as capacitance density per unit area, high-frequency decoupling, and ESL/ESR (Equivalent Series Inductance / Equivalent Series Resistance). They are also thinner and smaller, naturally adapting to vertical power delivery. By moving the PMIC and decoupling capacitors directly beneath the main chip, the power delivery path shrinks from centimeters to millimeters, parasitic impedance drops significantly, and capacitors absorb transient fluctuations in close proximity. For the same packaging area, this frees up more effective computing power and saves system energy consumption. Its value lies not in being "a better capacitor," but in acting as a lever for system performance and energy efficiency.
| Capacitors Evolve from "Materials" to "Part of the Architecture"
The core of the story Senwan is telling is not "we made a better capacitor," but rather advancing passive components from passive materials to an essential part of the packaging architecture.
Combining silicon capacitors with silicon-based IPD integrated substrates integrates resistors, inductors, and capacitors onto a single silicon board. This reduces external surface-mounted components, resulting in smaller and more reliable modules—optical modules are the most direct beneficiaries of this logic.
More crucially, there is a shift in industrial positioning: when capacitors are no longer passive materials but a part of the packaging architecture, the supplier's position shifts from "selling components" to a "key link in system-level packaging." Once this position is elevated, customer stickiness, bargaining power, and switching costs all follow. This is harder to replicate than any single parameter—because what the customer replaces is not just a single component, but an entire validated packaging solution.
| Domestic Substitution Will Not Happen Overnight, But Will Penetrate Layer by Layer
The current situation is clear: silicon capacitors are now dominated by a few manufacturers in Japan and Europe, with an extremely low domestic production rate. But do not romanticize this track—domestic substitution will not be a sudden thunderclap, but will penetrate layer by layer along high-value scenarios.
The reasonable path is: first, achieve successful delivery, establish a reputation, and demonstrate mass production capabilities in the two high-end scenarios of optical modules and AI power delivery; then, expand outward relying on cost and delivery advantages. This path is viable based on several points currently disclosed by Senwan: it is the first domestic IDM for mass production of wafer-level passive components, with a yield rate of over 95%, a capacity of 300 million units per month, and performance on par with Murata.
However, this path has an easily overlooked reverse constraint: the customers themselves are also undergoing integration.
Leading optical module companies have been integrating chips and packaging upstream in recent years, leaving open the possibility of developing silicon capacitors in-house or designating Japanese suppliers as primary sources. If Senwan's target customers are pursuing vertical integration themselves, the positive cycle of "scenario—mass production—customer" may get stuck at the last link—not because Senwan cannot produce it, but because customers do not intend to outsource this link. The same applies to the AI power delivery scenario: passive components in the packaging of GPU/ASIC main chips are often designated by the main chip manufacturers or packaging houses. What Senwan needs to enter is an architecture diagram already drawn by others.
In other words, the premise for the layer-by-layer penetration of domestic substitution is that someone is willing to open the door at each layer. What Senwan can control are the first two layers—scenario understanding and mass production capabilities; the third layer, "customers," is not entirely within its control.
But the true barrier is not a specific patent, but the systematic capability of understanding scenarios, achieving mass production, and securing customers. Patents can be circumvented, whereas customer trust and mass production discipline must be accumulated gradually through repeated deliveries—this is also the underlying reason why industry players are willing to lead the investment: they are buying a proven "system," not a technical blueprint.
| Several Follow-up Questions
Is the capital sufficient for this asset-heavy model: A capacity of 300 million units per month is considerable, but with a fully in-house IDM model, the Series A funding is more like seed money for a wafer-level production line. Whether subsequent revenue can cover expenses and turn depreciation into a scale advantage is the first hurdle for long-term survival. The invisible wall of customer validation: continuous delivery and a yield rate of over 95% are solid progress, but entering the packaging of GPU/ASIC main chips requires enduring automotive-grade/reliability/multiple rounds of validation, with cycles measured in years. International giants have decades of accumulated trust and failure data to back them up. For "performance on par" to translate into "daring to be the primary supplier," it must be proven by actual installed volumes.
Silicon capacitors are not Senwan's exclusive route. The high-end market for silicon capacitors itself was defined over decades by Japanese manufacturers such as Murata and TDK. What they hold is not just capacity and cost, but also failure data, reliability endorsements, and access to reference designs for main chip manufacturers and packaging houses. Senwan's "performance on par with Murata" holds true at the parameter level; however, to enter the packaging of GPU/ASIC main chips, customers ask not only "are your parameters good," but also "have you run in similar scenarios for five years, how many failures have occurred, and can you provide an endorsement for me."
Therefore, what Senwan can truly enter is the window for domestic substitution—scenarios where customers, out of supply chain security or cost considerations, are proactively willing to introduce a second supplier. This window is real, but its boundaries are also clear: it does not mean Senwan is grabbing market share in Murata's home court, but rather capturing the incremental portion that Murata has not yet covered or that customers are unwilling to rely entirely on Murata for.
Cyclical binding: high-value scenarios are in sync with AI capital expenditures. During an upcycle, asset-heavy models are a sharp weapon; during a downcycle, the pressure from depreciation and inventory also hits hard.
| Conclusion
Moving from "creating something from nothing" to "making it strong, from usable to excellent"—only those who can embed underlying components into high-end architectures, achieve mass production, and bind with leading customers will hold the industrial discourse power in the next stage.
A millimeter-scale silicon capacitor may seem inconspicuous, but it is a footnote to "power delivery sovereignty" in the AI computing era. Whether Senwan can transform "financing momentum" into "industrial momentum" depends not on how much was raised in this round, but on whether it can continuously run through the positive cycle of "scenario—mass production—customer."
When industry capital steps in to lead the investment in a capacitor, it indicates that the battlefield for AI computing power has quietly shifted from inside the chip to the few millimeters right beneath it.
Data is sourced from public disclosures and publicly available industry information. The views are for reference only and do not constitute investment advice.