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StarFive Breaks Taiwan Vendors’ 90% BMC Chip Monopoly with New RISC-V JH-B100 Series for AI Servers

by xiazhen·August 13, 2026

The explosive growth of intelligent computing centers is reshaping every link in the server supply chain, including the crucial yet often overlooked "server butler" hidden in the corner of the motherboard—the BMC (Baseboard Management Controller) chip.

Zhao Jing, Vice President of Marketing and Operations at Shanghai StarFive Semiconductor Technology Co., Ltd., revealed that this market, once considered a niche track, is expected to see a 56% year-over-year increase in shipments in 2026, approaching 30 million units, and will exceed 50 million units by 2028.

Photo | Zhao Jing, Vice President of Marketing and Operations at Shanghai StarFive Semiconductor Technology Co., Ltd.; Source: VeriSilicon

The NVIDIA GB200 requires up to 71 BMC chips per rack, underscoring the massive demand for refined management in AI (Artificial Intelligence) computing clusters.

However, the global BMC chip market has long been monopolized by two vendors from China Taiwan, which together hold nearly a 90% market share. Amid the intertwining of supply chain tensions and the demand for domestic substitution, the RISC-V camp is seizing market opportunities.

At the 5th Dishui Lake China RISC-V Industry Forum held today, StarFive Technology introduced its new-generation Baseboard Management Controller (BMC) chip—the JH-B100 series. It aims to tear through the seemingly solid technological and commercial barriers with high-performance RISC-V cores and deep ecosystem integration.

The essence of a BMC chip is to act as the "personal butler" of a server. It monitors the status of the CPU, GPU, network card, power supply, storage, and fans in real time through a dedicated network port, supporting remote power on/off, health monitoring, watchdog reset, KVM remote control, and fault log recording (similar to a server "black box").

Zhao Jing pointed out that the core barrier for BMC chips lies not in hardware complexity, but in the rhythm of ecosystem synergy. This is because BMC chips must synchronize with the iteration cycles of host chips from Intel, AMD, NVIDIA, and others, being integrated into OEM/ODM designs one to two years in advance. This means that without pre-research cooperation with mainstream CPU vendors, a BMC chip, no matter how powerful, will have no access to the market.

Against this backdrop, Zhao Jing introduced StarFive Technology's breakthrough strategy, which is first reflected in product definition. Its JH-B100S (full-featured single-node) was released at the end of 2025, featuring a self-developed high-performance quad-core RISC-V CPU. It boots to the BootLoader in less than 8 seconds, supports DDR4/DDR5 and PCIe Gen4, and includes built-in software development support from VeriSilicon.

In addition, the company will launch the dual-node version, JH-B100D, in Q3 this year. It can flexibly manage two CPU host chips running different operating systems independently, or interconnect them for a single scenario, directly addressing the flexibility requirements of Intel and AMD's next-generation CPUs. The third-generation product, JH-B100N, plans to integrate AI large models to analyze fan noise and operational data, predicting hardware failures in advance to achieve "early detection and early treatment."

Zhao Jing believes that what truly distinguishes StarFive from past challengers is its deep positioning at the ecosystem level. At the Intel Innovation 2025 conference, StarFive's BMC chip was featured on Intel's "Ecosystem Wall" for the first time, marking the recognition of its technical solution by Intel's technical team. At the Open Compute Technology Conference 2026, global firmware giant AMI showcased StarFive's chip alongside the world's top three BMC solutions. This means StarFive has entered the compatibility and adaptation lists of mainstream ODM/OEM and Internet vendors. More crucially, StarFive and Intel have already conducted preliminary technical exchanges on next-generation and the generation after next CPU products, achieving a synchronized rhythm of "when the CPU is launched, the BMC is ready."

At the software level, StarFive relies on the OpenBMC open-source operating system to provide full-stack support ranging from underlying drivers, SDKs, and Bootloaders to firmware. Whether customers adopt commercial firmware solutions, self-developed OpenBMC architectures, or private BMC architectures, they can quickly migrate their existing solutions. StarFive has integrated recipes for Intel CPUs (such as secure boot and firmware updates) into the native code of the OpenBMC community. Customers can directly download and integrate them, greatly reducing migration costs.

Meanwhile, stability is the lifeline of a BMC chip—the main CPU may crash, but the BMC must never disconnect. Zhao Jing emphasized that StarFive has completed extensive real-world scenario stress tests prior to official delivery, covering reliability, monitoring functions, and extended management functions. In terms of hardware support, it provides a full-featured evaluation board (a complete BMC verification platform) and a RunBMC plug-in card (which can directly replace customers' existing solutions for software development), along with IBIS/PDN models and schematic review services. In addition, StarFive also provides a QEMU simulation environment based on the SoC (System on Chip) simulation layer, allowing customers to develop software in advance before the hardware is ready, significantly compressing the R&D cycle.