"The evolution of computing architectures has never been a simple race of technical parameters, but rather an ecosystem reconstruction driven by new application scenarios," emphasized Sun Yanbang, Co-founder and President of SpacemiT, at the "RISC-V and Physical Intelligence Forum" co-hosted by the Shanghai Open Processor Industry Innovation Center (SOPIC) and VeriSilicon.
Photo | Sun Yanbang, Co-founder and President of SpacemiT
x86 seized the wave of personal computers, and ARM rode the express train of mobile terminals. Today, as robots move from industrial production lines to homes, fields, and cities, Physical AI poses unprecedented converged demands on computing power—it requires robust general-purpose CPU processing capabilities, large-scale AI parallel computing power, and real-time responses to ensure safety. These three elements are indispensable, yet traditional heterogeneous integration solutions are becoming a bottleneck for mass production at scale.
Sun Yanbang mentioned that over the past five years, SpacemiT has chosen a different path from merely replacing PCs or smartphones: leveraging the open DNA of RISC-V to redefine computing chips for robotics.
The company believes that new technologies are best suited for creating new products rather than engaging in price wars on old battlefields. Therefore, they proposed the concept of "homogeneous converged computing"—all computing units, whether general-purpose CPUs, AI accelerators, or real-time cores, are based on the same RISC-V architecture and share a unified memory address space.
This means developers no longer need to struggle among multiple programming languages and underlying frameworks, and different computing modules do not have to communicate through expensive and high-latency memory copies. Software silos are broken, hardware redundancy is eliminated, and a single chip can cover the diverse computing power requirements of robots.
This concept is gradually being implemented in product iterations. Sun Yanbang revealed that the company's first-generation chip, K1, has taken the lead in completing productization verification in key links such as speech recognition, visual perception, and motion control. The speech recognition accuracy exceeds 98%, and the binocular vision localization and odometry output have reached a commercially viable level.
The second-generation K3 further pushes the CPU computing power to 8 cores at 2.4GHz, scales up the AI computing power to 60 TOPS, and embeds real-time cores, specifically addressing scenarios like humanoid robots that demand extremely high reliability and response speeds. In actual testing, engineers from the Shanghai Humanoid Robot Innovation Center took only half a day to migrate a complete humanoid robot system from an ARM platform to the K3. From compilation to successful execution, the process was so smooth it hardly felt like an architecture switch.
Sun Yanbang emphasized that the significance behind this does not lie in benchmark scores, but in ecosystem efficiency. As robot shipments scale from millions to hundreds of millions or even billions, integrated and unified chip solutions will inevitably replace heterogeneous multi-board integration solutions. The ease of use of general-purpose CPUs, the flexibility of vector extensions, the determinism of real-time cores, coupled with the customization freedom brought by the open RISC-V instruction set, perfectly constitute a foundation capable of rapid iteration and broad adaptation. Mass production of Physical AI will not wait for the slow evolution of closed systems; it requires an open, unified, and scalable computing cornerstone.
The coupling of RISC-V and Physical AI may well be the true starting point of the computing ecosystem for the next decade. This is not a simple game of substitution, but a process of redesigning the "brain" for a new species. When every robot can possess computing power that is both sufficiently powerful and flexible, the intelligent world that has been repeatedly depicted will truly have a solid foothold for implementation.