Today, 8-inch SiC projects are successively entering the stage of large-scale mass production. Bruno Schuster, Head of Bosch Power Semiconductors Asia Pacific, pointed out that the core of the 8-inch capacity transition lies in the quality of substrates and devices, among which the yield control of SiC chips is particularly prominent.
In fact, the yield of SiC chips directly depends on the quality level of substrates and epitaxial layers. Recently, Coherent showcased a new technology from the domestic rising star "Chuangrui Spectrum" in an academic paper. This technology has facilitated key progress in the non-destructive inspection of substrate dislocation defects, providing strong support for improving material quality and process yield.
This article aims to analyze the three major challenges faced in defect detection during the preparation of SiC substrates, epitaxial layers, and devices, and to explore how domestic inspection equipment can build defect detection capabilities covering the entire process based on optical non-destructive testing technology.
Analysis of SiC Yield Bottlenecks: Mainstream Inspection Technologies Face Three Major Challenges
In the actual production of the SiC industry chain, yield improvement lacks systematic data support. To sum up, it mainly faces three core challenges:
Challenge 1: Difficulty in Lattice Defect Detection: Limitations of Traditional Methods
"Killer defects" that lead to device failure can largely be traced back to various lattice defects in the wafer. These defects include "extended defects" composed of dislocations and stacking faults, as well as "point defects" such as carbon vacancies. They ultimately lead to device performance collapse or reliability degradation by increasing leakage current, reducing carrier lifetime, or inducing new defects.
Currently, conventional optical inspection methods on the production line still focus on identifying macroscopic features such as surface scratches, pits, and particles. For lattice defects (such as dislocations and point defects) that also affect the electrical performance of devices, although dedicated optical non-destructive testing technologies such as Photoluminescence (PL) and Raman spectroscopy are available, the types of detectable defects are limited. For example, it is difficult to detect dislocation defects in SiC substrates and to distinguish defects such as Threaded Screw Dislocation (TSD) and Threaded Edge Dislocation (TED) in epitaxial layers.
The traditional KOH etching method is a general method (national standard method) for detecting dislocation and other defects in SiC wafers. Although it has been widely used in the industry, this method has disadvantages such as poor TSD detection effect and being destructive, so it is only suitable for sampling inspection.
In contrast, although X-ray Topography (XRT) can achieve non-destructive testing, due to high equipment costs and extremely long testing times, it is only suitable for laboratory-level sampling or academic research, and cannot match the requirements of takt time and cost for industrialized mass production. As wafers rapidly iterate from 6-inch to 8-inch and 12-inch, and the scale of mass production continues to expand, these "slow" or "wafer-destroying" inspection methods can no longer meet the growing inspection needs and requirements in the industry.
Challenge 2: Difficulty in Defect Tracking: Data Discontinuity Makes Traceability Hard
Due to the lack of rapid and non-destructive inspection methods for SiC lattice defects, the industry has long found it difficult to mark and track defects throughout the entire process.
At present, the detection of substrate defects on the production line generally relies on destructive KOH etching sampling (or XRT sampling) rather than full inspection. Moreover, existing inspection standards (such as GB/T and SEMI) mainly focus on the substrate end. A full-chain systematic tracking and evaluation system that covers the entire process from substrate to epitaxy to devices, and covers different types of lattice defects from microscopic (point defects, dislocation defects) to macroscopic (stacking faults), has not yet been truly established.
In view of this, when terminal devices fail, companies often find it difficult to accurately determine the root cause of the failure due to the lack of comprehensive defect data in the intermediate links.
From the perspective of lattice defects, the inheritance and transformation of substrate defects, point defects introduced by epitaxy (such as carbon vacancies), or lattice damage and residual stress caused by ion implantation are all possible causes leading to device failure.
Therefore, the accurate analysis of failure causes largely depends on full-chain defect data. However, the lack of systematic lattice defect data restricts the efficiency of product iteration and the rapid ramp-up of mass production yield to a certain extent.
Challenge 3: Inadequate Analysis of Defect Impact: Cognition from 2D to 1D and 0D Defects
In the past, the industry's research focus on defects mainly concentrated on 2D extended defects (such as stacking faults, SF). Their fatal impact on device performance as "killer defects" has been fully verified through extensive failure analysis. However, there is still a lack of sufficient research and verification on the impact mechanisms of 1D dislocations (such as Basal Plane Dislocation (BPD), Threaded Screw Dislocation (TSD), and Threaded Edge Dislocation (TED)) and 0D point defects (such as carbon vacancies) on device performance and long-term reliability.
Compared with killer defects, the defect density of 1D and 0D defects such as TSD/TED and point defects increases exponentially, and their impact on device performance is also extremely complex. The verification of their failure relationship needs to be based on statistical analysis of large-scale data rather than the "occasional" correlation of a single wafer.
Due to the general lack of production-line-level high-throughput non-destructive inspection methods, the industry still finds it difficult to obtain the complete statistical weight distribution between various defects (0D, 1D, 2D) and chip yield. Therefore, the analysis of their impact mechanisms still faces huge challenges.
Chuangrui Spectrum Focuses on Core Inspection Challenges to Build a Full-Chain Non-Destructive Inspection System
In response to the above three major industry challenges, domestic inspection equipment companies have relied on independent innovation technologies and have made considerable progress in the field of SiC defect inspection.
For example, advanced optical inspection technology companies represented by AK Optics have SiC bright-field and dark-field defect inspection, PL photoluminescence inspection, and other products that can fully compete with international imported brands. In addition, innovative companies represented by Chuangrui Spectrum rely on independently developed time-resolved spectral imaging technology to focus on developing lattice defect inspection products for compound semiconductors such as SiC.
In May this year, Coherent published a thematic paper on the analysis of silicon carbide epitaxial and substrate defects in the international academic journal "Defect and Diffusion Forum". In this study, Chuangrui Spectrum's efficient inspection solution was applied to defect characterization, and the relevant data provided a key basis for improving the yield of SiC chips.
Combining Coherent's paper and the layout progress of Chuangrui Spectrum, domestic independent technology is expected to provide a systematic breakthrough solution from three dimensions: inspection method innovation, data chain integration, and in-depth analysis of failure mechanisms.
First, advancing optical non-destructive inspection technology: from "destructive sampling" to rapid "non-destructive full inspection".
Based on technologies such as time-resolved spectral imaging and utilizing the principle of photo-generated carrier dynamics in semiconductor materials, Chuangrui Spectrum has successfully developed various dedicated equipment for non-destructive inspection of dislocation defects in substrates/epitaxy/devices and high-speed minority carrier lifetime imaging inspection. It has taken the lead globally in solving the industrialization problem of non-destructive inspection of dislocation defects in SiC substrates, and this breakthrough technology is continuously gaining industry recognition.
In the substrate link, the DISPEC-9000 fully automatic non-destructive inspection system for dislocation defects focuses on N-type SiC substrate wafers. It can accurately identify various defects such as TED, TSD, BPD, SF, MP, carbon inclusions, and polytypes, and is compatible with 6/8/12-inch and Si/C face inspection. Relying on high-throughput design (4-5 wafers/hour for 6-inch, 2-3 wafers/hour for 8-inch, 1 wafer/hour for 12-inch) and AI intelligent analysis, it truly implements "full inspection of every wafer".
In the epitaxy and device links, the SR-9000 epitaxial dislocation defect inspection system provides a one-stop inspection solution from substrate to epitaxy. It can be applied to key scenarios such as back-end wafer inspection, chip failure analysis, post-gate oxide die inspection, and post-de-metalization die inspection. With the high precision and high sensitivity endowed by time-resolved spectroscopy technology, it effectively supports defect identification and reliability evaluation.
In terms of point defect inspection, the TAU-9000 minority carrier lifetime imaging inspection system is based on the strong correlation between wafer minority carrier lifetime and point defect concentration, specializing in the rapid evaluation of point defects, surface contamination, and impurities in epitaxial wafers.
This equipment is compatible with 6/8/12-inch wafers, and the inspection time for a single 6-inch wafer can be controlled within 10 minutes. At the same time, it features high time resolution (<5 ns) and high spatial resolution (~100 μm, wafer imaging), adjustable excitation wavelengths (355/266 nm), supports bulk/surface dual-mode inspection, and is not interfered by substrate signals, providing a precise and efficient inspection tool for SiC wafer quality characterization.
Notably, the R&D team of Coherent, a world-renowned SiC substrate supplier, fully affirmed the key performance of Chuangrui Spectrum's optical non-destructive inspection technology, including accuracy, inspection speed, repeatability, and reliability, in their published academic paper. This marks that Chuangrui Spectrum's technical route has obtained empirical recognition from international leading enterprises.
Second, establishing a full-chain defect tracking system: integrating the "substrate-epitaxy-device" data link.
In response to the industrial problem of difficult defect tracking, Chuangrui Spectrum has built full-chain defect tracking capabilities with "optical non-destructive inspection" as the core technical route, establishing a full-link defect inspection system covering substrates, epitaxy, and devices.
Dual inspection at the epitaxy end: The SR-9000 epitaxial dislocation defect inspection system and the TAU-9000 minority carrier lifetime imaging inspection system work collaboratively to complete the dual control of dislocation defect identification and point defect evaluation in the epitaxy link. Among them, TAU-9000 has the unique advantage of being immune to substrate signal interference, ensuring that the inspection data truly reflects the quality of the epitaxial layer and providing reliable input for subsequent device processes.
Full-Chain Defect Tracking System from Substrate to Wafer Source: Chuangrui Spectrum, Acts Compound Semiconductor
Die-to-Die in-situ tracking closed-loop: Through the collaboration of the above equipment, the defect information of each die can achieve in-situ tracking and data correlation from the substrate to the epitaxial layer. Once the terminal device fails, engineers can immediately trace back the "historical archives" of the die at the substrate and epitaxy stages, thereby accurately attributing the source of failure and quickly guiding the direction of process improvement. This capability leap from "post-event guessing" to "pre-event recording and post-event tracing" is becoming the core infrastructure for leading customers to improve comprehensive yield.
Third, analyzing the defect impact mechanism: helping the industry chain overcome the "dislocation and point defect" challenges.
In addition to providing inspection equipment, Chuangrui Spectrum is also striving to promote research on the impact mechanisms of microscopic dislocation defects and point defects on devices. Looking to the future, the completion of this mission cannot be separated from the open cooperation and data sharing of the entire industry chain. This not only requires the innovation of a new generation of device design concepts but also requires the substrate, epitaxy, and device manufacturing links to work together to build an industry knowledge base.
Summary by Acts
From solving the inspection problem of "invisible" lattice defects, to building a "traceable" data chain, and then to "figuring out" the failure mechanisms of various defects layer by layer—this technology evolution path essentially reflects the internal logic of the SiC industry's transformation from "scale expansion" to "quality-driven".
In this process, SiC inspection technology is evolving from a single "quality control tool" on the production line to a core "process engine" leading yield improvement.
As the SiC industry enters a new stage where scale and high quality are equally important, only continuous breakthroughs in inspection capabilities can support the industry's higher pursuit of yield and reliability. The breakthroughs of domestic enterprises such as Chuangrui Spectrum in cutting-edge inspection technologies are transforming this logic into practical and implementable capabilities, thereby promoting the vigorous growth of the industry.