On July 18, 2026, at the "RISC-V and Physical Intelligence Forum" co-hosted by the Shanghai Open Processor Industry Innovation Center (SOPIC) and VeriSilicon, Li Huaqing, Co-founder and Vice President of Lingrui Zhixin, delivered a keynote speech centered on "Development Opportunities for High-Performance RISC-V CPUs in the Agent Era".
Figure | Li Huaqing, Co-founder and Vice President of Lingrui Zhixin
Li Huaqing noted that at the turning point where AI evolves from "being able to chat" to "being able to work," the computing paradigm is being redefined. This year, the emergence of "crayfish"-like agents has made the industry realize that AI is no longer a mere reasoning black box, but a complex system that requires frequent tool invocation, memory management, multi-task coordination, and security assurance.
In this transition, the role of the CPU has quietly returned. It has leaped from being a supporting player alongside the GPU to the "commander-in-chief" for agent deployment—responsible for context management, long-term memory retrieval, tool execution scheduling, and even the frequent creation and destruction of sandboxes. As model inference is no longer the sole focus of computing power, the CPU is becoming the new bottleneck determining agent response speed and system throughput.
In the generative AI era, the CPU primarily handles data preprocessing and I/O scheduling; however, in the agent era, the CPU is deeply involved in the inference process, managing KV Cache, vector database access, as well as coordination and monitoring among multiple agents. Faced with such complex workloads, traditional general-purpose CPU architectures struggle to balance efficiency and flexibility. As Moore's Law slows down and process node dividends peak, the industry urgently needs a new path—one that deeply adapts to specific scenarios while maintaining ecosystem compatibility.
RISC-V provides the answer to this: open, scalable, and modular, allowing enterprises to customize at the instruction set level as needed, integrating domain-specific features into pipeline design to achieve architecture-level hardware-software co-innovation.
This is precisely the entry point for Lingrui Zhixin. As a startup founded just a year and a half ago, its team hails from IBM, bringing years of experience in ultra-large-scale chip R&D.
According to Li Huaqing, the P100, the first high-performance RISC-V core launched by Lingrui Zhixin last year, is tailor-made for the agent era. Its pipeline depth exceeds 20 stages, and the width for instruction fetch, decode, and dispatch per cycle ranks in the industry's first tier; more importantly, it is currently the only domestic RISC-V core that supports dynamic simultaneous multithreading (SMT4).
"This feature is particularly critical in I/O-intensive and control-intensive scenarios—when data supply is slower than computing speed, multithreading can keep computing resources fully loaded, much like equipping a head chef with multiple prep cooks, significantly increasing output per unit of time. For typical agent workloads such as database access and multi-task concurrency, it can deliver performance gains of 50% to 80%," Li Huaqing explained.
Beyond concurrency capabilities, the P100 also features in-depth design for enterprise-grade reliability. Li Huaqing mentioned that agents run for long periods with extremely long decision chains, meaning the impact of hardware failures will be cascaded and amplified. Lingrui Zhixin has built a full-stack RAS mechanism at the chip, firmware, and system levels, supporting error detection, isolation, and even self-healing, to ensure data integrity and computational trustworthiness. All of this is built upon the open RISC-V ecosystem—enabling synchronized evolution with the global community while remaining autonomous and controllable, meeting the nation's security demands for critical computing infrastructure.
From a market perspective, RISC-V is breaking through upwards from edge-side scenarios such as IoT (Internet of Things) and embedded systems. In 2024, the RVA23 profile added virtualization and vector support; starting in 2025, high-performance cores have been emerging one after another, and data center-grade RISC-V CPUs are no longer just a blueprint. The release of Lingrui Zhixin's P100 is attempting to become a pioneer of new-domain and new-quality computing power in the agent era. Whether for edge computing, cloud computing, embodied AI, or the low-altitude economy, the P100 aims to provide customers with an option that is more flexible than ARM and more open than x86, through higher concurrency, deeper pipelines, and stronger scalability.
The explosion of agents has just begun. IDC predicts that by 2030, global enterprises will have 2.2 billion active agents, corresponding to a CPU incremental market of tens of billions of dollars. In this reconstruction of the computing power system, RISC-V may take center stage with its openness and customizability.