[Companies Mentioned in This Article] Intel, Lens Technology, BOE, Corning, Samsung Electro-Mechanics, SKC, Absolics, AGC, SCHOTT, Nippon Electric Glass, 3D Glass Solutions, WG TECH, Sky-Semi, HGTECH, Hymson, DR Laser, Delphi Laser, Han's Laser, Tiancheng Technology, Jianghua Microelectronics, Linuo Pharmaceutical Packaging, GBJ, Kibing Group, Kaisheng Technology, CHGH, Dongxu Optoelectronics, Medicai, etc.
I. Joint Promotion of TGV Packaging Validation
On July 24, 2026, Intel and Lens Technology announced an exploration of collaboration focusing on glass substrate packaging. Later that evening, Lens Technology disclosed that its wholly-owned subsidiary, Lens International (Hong Kong) Co., Limited, signed a Memorandum of Understanding with Intel Corporation, listing Advanced Packaging with TGV (Through Glass Via) as a key discussion direction; Intel has positioned Lens Technology as a "valuable potential partner in this field."
Figure: Organizational Structure of TGV Collaboration Division of Labor Between Intel and Lens Technology; Source: Public Information
Intel provides illustrative architecture information, DFM (Design for Manufacturing) guidelines, benchmarking, and validation methods, while Lens Technology undertakes the through-hole formation on glass substrates, high-precision laser processing, metallized via deposition, and multi-layer interconnect routing; both parties take the joint validation of advanced packaging for TGV glass substrates as the core node, and explore application directions such as AI PC, data center servers, and embodied AI.
Table: Comparison of TGV Collaboration Division of Labor Between Intel and Lens Technology
The above chart indicates that the key to the collaboration between the two parties does not lie in the supply of a single material, but in connecting packaging architecture, design rules, and validation methods with the manufacturing capabilities of glass via formation, metallization, and multi-layer routing into an iterable joint validation path.
Intel CEO Lip-Bu Tan expressed this complementary relationship quite directly:
"As AI systems continue to push the boundaries of performance, scale, and efficiency, advanced packaging is becoming a critical driver of semiconductor innovation. Intel has deep expertise in semiconductor architecture and advanced packaging technologies, while Lens Technology possesses world-class capabilities in precision glass processing, laser manufacturing, and scaled production. Through this collaboration, we have the opportunity to explore new pathways in advanced packaging, unlocking next-generation system-level innovations for the AI era."
The collaboration will also explore directions such as AI PC components, high-reliability structures and thermal solutions for data center servers, AI robots, smart industrial equipment, and edge computing hardware. For Lens Technology, what is truly worth tracking is whether its processes can generate a "certification spillover" through Intel's validation system—that is, enhancing credibility within the common technical language of other customers in North America, South Korea, and elsewhere.
II. Mass Production Potential of TGV Glass Substrates
Organic core substrates have supported the packaging industry for the past twenty-five years, but multi-die, HBM (High Bandwidth Memory), high power consumption, and large-size AI packaging are pushing them to the comprehensive boundaries of warpage, dimensional stability, via density, and high-frequency loss. Glass is not just a "prettier substrate," but rather attempts to rewrite these constraints from the underlying material level through higher flatness, controllable coefficient of thermal expansion, low dielectric loss, and panel-level adaptability.
The table below summarizes the key characteristic differences among three mainstream packaging carriers.
In its accompanying study "Glass in Semiconductors 2026–2036," IDTechEx expands on the opportunities for glass in semiconductors across scenarios such as packaging, interconnects, RF, and photonic devices. This also highlights the need to distinguish three interrelated but distinct pathways: ① glass core substrates achieving vertical interconnects via TGV; ② glass interposers handling high-density redistribution; and ③ glass optical waveguides/glass fan-out couplers serving CPO (Co-Packaged Optics) optical interconnects. The direct focus of the Lens Technology-Intel collaboration is the first category, namely glass core substrates and their TGV processes.
Figure: Intel ECTC 2026 Measured Performance Comparison Chart; Source: Intel ECTC 2026 Public Measured Data
Intel ECTC 2026 measured data comparison: The warpage of the glass core substrate under high-temperature die attach conditions is 64 micrometers, whereas the organic substrate with stiffeners reaches 143 micrometers; the pattern distortion in the glass substrate process is reduced by up to 50% compared to the organic core material.
The difficulty in TGV manufacturing is not merely "drilling holes." Converting raw glass sheets into advanced packaging substrates involves at least five intercoupled stages: laser-induced and chemical etching for via formation, seed layer deposition, electroplating for via filling, multi-layer RDL (Redistribution Layer) routing, and singulation cutting. Their common goal is to simultaneously control via geometry, copper filling voids, inter-layer alignment, thermal cycling cracking, and edge micro-cracks at the panel-level scale.
Figure: Full-Process Chain Diagram of TGV Glass Substrates (Vertical Version); Source: Public Process Information
Full-process chain of TGV glass substrates: The upstream raw sheet segment is dominated by overseas players, the midstream includes five core processes—via formation, seed layer deposition, electroplating via filling, multi-layer RDL routing, and singulation cutting, and the downstream connects to applications in AI accelerators, co-packaged optics, and RF devices.
The first stage is via formation. Accurately drilling millions of micrometer-level vias on glass approximately 0.8 mm thick requires not only ensuring through-hole connectivity but also guaranteeing smooth via walls free of micro-cracks. The mainstream Laser Induced Deep Etching (LIDE/LAE) modifies the glass locally using ultra-short pulse lasers, followed by selective wet etching, which can reduce the risk of chipping and cracking caused by traditional thermal processing.
The second to fifth stages are respectively seed layer deposition to solve metal adhesion and via wall coverage, electroplating requiring void-free full copper filling, RDL routing that determines high-density interconnect capabilities, and singulation cutting to avoid chipping and micro-cracks.
The key industry judgment here is that via formation is no longer the only bottleneck; mass production pressure is shifting towards the back-end processes of seed layer, electroplating via filling, and multi-layer RDL. IDTechEx also emphasizes that high mass production feasibility depends on the repeatable control of via geometry, seed layer coverage of re-entrant structures, void-free metal deposition, thermal cycling crack suppression, and high-speed full inspection for millions of vias. This is precisely why DFM guidelines, benchmarking, and validation methods are more decisive than "single via diameter records."
III. Capability Puzzle of Intel and Lens Technology
Intel:
Intel's accumulation in glass substrates has entered the engineering validation stage rather than the material concept stage. The company included glass substrates in its advanced packaging roadmap in 2023; as of May 2026, it has accumulated over 1,000 inventions in glass substrate architecture, processes, materials, and equipment. At ECTC 2026, the glass core substrate results disclosed by Intel advanced "feasibility" to the system level of co-integration of panels, vias, metallization, interconnects, and optical waveguides.
Two technical conferences in the first half of 2026 presented these accumulations to peers in a quantified form for the first time. At the IEEE Electronic Components and Technology Conference (ECTC 2026), Intel Foundry published a total of 20 papers, among which the glass substrate-related results constituted a quite complete engineering answer sheet.
Figure: Intel Thick Glass Core + EMIB Exhibit at NEPCON Japan 2026; Source: TechPowerUp / Intel Foundry, NEPCON Japan 2026 Exhibition Report (2026-01-22)
The "10-2-10 Thick Glass Core Substrate with EMIB" displayed on-site at NEPCON Japan 2026 materialized the above roadmap: the exhibit emphasized a 78×77 mm package, 24-layer structure, 300 μm glass core, two EMIB (Embedded Multi-die Interconnect Bridge) bridges, and No SeWaRe (no micro-crack) cutting. The exhibit itself does not represent mass production, but it demonstrates that Intel has validated the glass core, embedded silicon bridges, and assembly reliability within the same engineering sample.
Intel's other card is the glass optoelectronic integration in the CPO direction. At ECTC 2026, it showcased a detachable edge coupling solution, utilizing glass fan-out couplers and beam expander connectors to improve the coupling tolerance between optical fibers and photonic chips. Thus, glass is not just a "less warp-prone carrier," but could also become a unified platform where electrical and optical interconnects converge.
Lens Technology:
Lens Technology's undertaking capability stems from the migration of precision glass back-end processes to semiconductor scenarios. The company claims to have over 30 years of accumulation in glass back-end processing, and in 2023, it listed TGV glass substrates as a key R&D direction. Its proprietary laser-induced and chemical etching via formation technology has achieved a 0 ppm non-through rate for millions of vias, with the minimum via diameter capable of reaching below 10 micrometers. However, this should be accurately understood: 0 ppm is a single indicator of via through-rate at the sample stage, which is not equivalent to the comprehensive mass production yield of the entire glass core substrate panel. The latter still depends on the cumulative results of metallization, RDL, cutting, and reliability testing.
Figure: Lens Technology TGV Technology Evolution and Capacity Path Diagram; Source: Compiled by Science and Technology Daily
Lens Technology TGV glass substrate technology evolution and capacity path: From establishing the R&D direction in 2023, to building an independent pilot production line in 2026, exhibiting the 0 ppm glass core carrier at WAIC and signing a memorandum with Intel, and then to the commissioning of a 3,000-sheet monthly capacity pilot line and a 30,000-square-meter dedicated factory building by the end of 2026, with plans to achieve small-scale mass production in 2027.
Lens Technology disclosed that it has jointly developed and validated a 22-layer glass core carrier with chip foundry and advanced packaging customers in North America and South Korea; the South Korean customer has basically passed the validation, and the validation work with the North American customer is progressing smoothly. In 2026, the company plans to build a 3,000-sheet/month pilot line, and the planned 30,000 square meters is the construction area of the TGV-dedicated factory building, expected to be put into production by the end of 2026; the goal for 2027 is small-scale mass production of semiconductor glass substrates. This timeline indicates that Lens Technology is not starting from scratch, but is still in the critical transition period between "process run-through—customer validation—small-scale mass production."
Therefore, the best interpretation of this collaboration is not "Intel chose a glass supplier," but rather "Intel is aligning its engineering criteria for glass packaging with Lens Technology's existing capabilities in via formation, metallization, and multi-layer interconnect manufacturing." Whether this can be translated into commercial value depends on whether the 22-layer structure, back-end yield, long-term reliability, and customer certification can be advanced synchronously.
IV. Full Picture of Domestic and International TGV Supply Chain Advancement
The industrialization of glass substrates is moving from single-point R&D into a new stage of parallel advancement in "international validation, equipment upgrading, material adaptation, and customer introduction." The Intel thick glass core + EMIB sample exhibited at NEPCON Japan 2026 proves that the glass core, embedded silicon bridges, and assembly reliability can be synergistically validated within the same engineering sample; IEEE ECTC 2026 further extends the industry perspective to CPO glass couplers, 510×515 mm panel-level manufacturing, and 1.5 μm-level fine patterning. These public results collectively convey a positive signal: glass substrates are no longer just a forward-looking option at the material end, but are becoming an engineering platform jointly participated in by advanced packaging system design, manufacturing equipment, and optoelectronic interconnects.
The significance of international conferences and industry exhibitions lies precisely in testing originally scattered process nodes under the same set of system objectives: whether large-area glass panels can be processed stably, whether fine-line RDL can be aligned with high precision, whether electrical vias and optical I/O can be co-packaged, and whether these capabilities can be accepted by reliability standards and customer testing. For Lens Technology, the value of Intel's open architecture, DFM, and validation methods is also reflected in the ability to embed its laser, etching, via metallization, and multi-layer routing capabilities into this more complete industrialization process.
Figure: IEEE ECTC 2026 CPO Glass Fan-Out Coupler and Packaging Diagram; Source: IEEE ECTC 2026 Official Technical Tipsheet Page 6
The glass fan-out couplers, detachable beam expander connectors, and CPO packaging physical objects at ECTC 2026 present the technical imagination space for glass extending towards co-packaged optics. Among them, glass couplers serve high-tolerance connections between optical fibers and photonic integrated circuits (PIC); TGV glass core substrates focus on vertical electrical interconnects and structural stability in packaging. The two have different process objects but jointly point to the long-term demand for higher bandwidth, larger package sizes, and lower system power consumption. Meanwhile, the results disclosed by USHIO at the conference—stitch-free exposure in the 18-reticle area of 510×515 mm glass substrates and 1.5 μm line width/space—also show that the basic capabilities for large-panel precision processing are improving.
From a global layout perspective, glass substrates have formed an advancement pattern of "international leadership, multi-route parallel advancement, and supply chain synergy": companies such as Intel, Absolics, TSMC (Taiwan Semiconductor Manufacturing Company), Samsung Electro-Mechanics, BOE, and Lens Technology are deploying in directions of packaging architecture, materials, panel manufacturing, equipment, and customer introduction, respectively. Although the pace of different enterprises varies, they have jointly promoted glass substrates from technical samples to engineering validation, production line planning, and application introduction.
Figure: Comparison Chart of Mass Production Time Windows for Major Global Glass Substrate Players; Source: Public Industry Information
Comparison of mass production time windows for major global glass substrate players: SKC/Absolics initiated the commercial mass production line earliest, Intel targets full commercialization by 2030, TSMC's CoPoS pilot line has been set up, Samsung Electro-Mechanics postponed to after 2028 due to setbacks in sample reliability validation, and BOE and Lens Technology respectively plan initial mass production in 2027.
The case of Samsung Electro-Mechanics adjusting its mass production plan due to the pace of customer reliability validation illustrates that the industrialization of new materials for advanced packaging usually needs to go through complete stages such as samples, engineering validation, customer certification, and production line introduction. This also indirectly highlights the significance of Intel providing benchmarking and validation methods to Lens Technology: when manufacturing capabilities are synchronously aligned with international customer standards, TGV glass substrates have a better chance of transforming technical demonstrations into replicable product capabilities.
Supply chain transmission is not limited to the substrate manufacturers themselves. Zhongtai Securities estimates that the investment for a domestic 510×515 mm glass substrate production line is about 1.3 to 1.5 billion RMB, with laser drilling and etching lines accounting for about 30% of the equipment value, PVD (Physical Vapor Deposition) and photolithography (yellow light) equipment accounting for about 50%, and supporting equipment such as cleaning, baking, and AOI (Automated Optical Inspection) accounting for about 20%.
Figure: Equipment Value Distribution Chart for 510×515 mm Glass Substrate Production Line; Source: Public Estimation by Zhongtai Securities
Equipment value distribution for the 510×515 mm glass substrate production line: PVD coating and photolithography equipment account for about 50%, laser drilling and etching lines account for about 30%, supporting processes such as cleaning, baking, and AOI inspection account for about 20%, and the investment for a single production line is 1.3–1.5 billion RMB.
The table below summarizes the representative progress in various segments of the domestic supply chain.
The disclosures from international exhibitions, global timelines, and equipment value distribution all point to the same conclusion: glass substrates have moved from a single-point process competition to a stage of synergistic advancement in "materials—equipment—packaging design—optical interconnects—validation standards." As panel-level manufacturing, equipment adaptation, and joint customer validation continue to advance, this synergistic network is expected to become an important support for the industrialization expansion of glass substrates.
V. Future Directions of TGV Glass Substrates
The collaboration between Lens Technology and Intel provides a practically grounded pathway for China's precision glass manufacturing to enter the core segments of advanced packaging: Lens Technology's capabilities in laser processing, chemical etching, via metallization, and multi-layer routing are being integrated into the common technical language used by global high-end customers through Intel's packaging architecture, DFM, benchmarking, and validation methods.
Looking ahead, the industrialization of glass substrates will not be determined by any single indicator, but jointly driven by the systemic capabilities formed by "material stability, equipment precision, process yield, packaging design, and customer certification"; this happens to be the direction where China's display glass, precision manufacturing, laser equipment, vacuum coating, electroplating chemicals, and advanced packaging supply chains can exert synergistic efforts.
As AI accelerators, HBM, large-size chiplets, and CPO impose higher requirements on package size, interconnect density, and signal integrity, glass substrates are expected to achieve application breakthroughs first in high-value-added, high-reliability, and high-bandwidth scenarios, and then gradually expand penetration along panel-level manufacturing and supply chain localization. For Lens Technology, the most anticipated aspect in the future is not the amplification of a single concept, but the formation of a continuous industrialization closed loop through its dedicated factory buildings, pilot production lines, joint customer validation, and standard participation; once this closed loop is successfully run, Lens Technology's precision glass manufacturing capabilities will extend from the traditional advantages in consumer electronics components to become an important manufacturing foundation for advanced packaging in the AI era.
References:
[1] Intel and Lens Technology Join Hands to Advance Advanced Semiconductor Packaging for the AI Era - Intel Newsroom (2026-07-24)
[2] 300433, Hand in Hand with Intel! Focusing on TGV Advanced Packaging - Phoenix Finance (2026-07-25)
[3] Lens Technology Partners with Intel to Expand into the Core Track of TGV Glass Substrate Advanced Packaging - Shanghai Securities News · China Securities Network (2026-07-24)
[4] ECTC 2026 Intel: Glass Substrate Platform for Next-Generation AI Advanced Packaging - Intel ECTC 2026 Paper Technical Interpretation (2026-06-16)
[5] Intel and Lens Technology Collaborate to Enable Advanced Semiconductor Packaging for the AI Era - Intel Newsroom (2026-07-24)
[6] On the Eve of Glass Substrate Mass Production, Who Can Reap the Dividends in the Supply Chain? - OFweek New Materials Network (2026-06-23)
[7] Lens Technology Partners with Intel, Giants Compete to Bet on TGV Glass Substrates - Jiemian News · Reposted by East Money (2026-07-27)
[8] Intel Unveils Glass Core Substrate with EMIB Multi-Chip Connection - TechPowerUp, NEPCON Japan 2026 Exhibition Report (2026-01-22)
[9] IEEE ECTC 2026 Press Center & Technical Tipsheet - IEEE Electronic Components and Technology Conference (2026)
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