In the first half of 2026, Puya Semiconductor achieved a revenue of 3.959 billion RMB, a year-on-year increase of 336.67%; its net profit attributable to shareholders reached 827 million RMB, surging by 1929.65% year-on-year; and its gross profit margin climbed to a historical peak of 51.15%. As an engineer who has long focused on semiconductor processes and design, I prefer to look beyond the shell of this financial report and see what lies behind the numbers.
Dual Process Platforms: SONOS + ETOX
In the NOR Flash sector, mainstream industry players such as Winbond, Macronix, and GigaDevice generally adopt the floating gate ETOX process structure. Puya Semiconductor has taken a differentiated route by being the first to apply the SONOS process structure to the R&D and design of NOR Flash.
Why is SONOS worth attention? At the device level, SONOS adopts a two-transistor (2T) cell common-source structure, which effectively controls leakage in the memory cells and achieves extremely low static power consumption. For wearable devices and IoT (Internet of Things) applications, this is a critical competitive advantage. More importantly, the SONOS process has relatively low complexity, reducing the number of photomasks and directly lowering the unit cost.
During the reporting period, Puya Semiconductor has made its 40nm products based on the SONOS process the main shipment volume and launched the more advanced 40E series. Meanwhile, the ETOX platform has also advanced to the 4Xnm process node, with high-capacity products ranging from 256Mbit to 1Gbit being introduced to major customers in the PC and server markets.
The parallel advancement of the dual process platforms means that Puya Semiconductor has greater design flexibility and process selection options in its product line layout.
Acquisition of SHM
When looking at the acquisition of SHM, one should not just focus on the financial consolidation data (contributing approximately 2.346 billion RMB in revenue in the first half of the year). From the perspective of technology integration, this is a crucial completion of engineering capabilities.
Puya Semiconductor was originally strong in chip design, while SHM possesses system-level engineering capabilities such as firmware algorithm development, memory chip testing solutions, integrated packaging design, and memory product customization. The two parties have established a joint development mechanism for new NAND products. Through this mechanism, Puya Semiconductor is gradually accumulating product engineering experience and achieving the digestion and absorption of SHM's core technologies.
Supply chain synergy is also highly noteworthy. Puya Semiconductor is promoting the introduction of domestic wafer and packaging and testing resources by SHM. It has currently contacted several well-known semiconductor manufacturers to mitigate the risk of reliance on a single supplier. This is a substantive reinforcement for long-term supply chain security.
From a technical dimension, this acquisition enables Puya Semiconductor to achieve a capability closed loop from chip design to chip design + system-level engineering implementation. This is the true connotation of the "Memory X" strategy.
R&D Investment
In the first half of the year, R&D expenses reached 226 million RMB, a year-on-year increase of 53.01%. The R&D team consists of 345 members, accounting for 55.91% of the company's total workforce. The proportion of employees with a bachelor's degree or above exceeds 96%. The increase in R&D investment mainly comes from personnel compensation and the depreciation and amortization of IP and testing equipment, indicating that the company is increasing its bets on both capital-intensive R&D platforms and high-end talent. Additionally, equity incentive plans across various periods cover more than 80% of all active employees.
Conclusion
What truly interests me in Puya Semiconductor's semi-annual report is not the 19-fold profit growth figure, but the technological evolution path it reveals for a semiconductor company transitioning from chip design to system-level engineering. The continuous iteration of dual process platforms, the integration of engineering capabilities post-acquisition, and the high-density investment in R&D talent—these are the foundations supporting the financial figures. In a global market dominated by memory chip giants, can Chinese companies break through not by price wars but by technological depth? Puya Semiconductor has provided a sample worth tracking.