2026 marks the year of massive rollout for Chinese automakers' in-house autonomous driving chips. From the large-scale deployment of NIO's Shenji NX9031, to the official release of Li Auto's Mach M100, and then to the mass production of BYD's Xuanji A3, leading automakers have unanimously elevated in-house chip development to a strategic height. Behind this chip-making boom, different companies have also chosen different technological routes. So, is automakers developing in-house chips a technological breakthrough or a waste of resources?
01. NIO and BYD Push Mature Architectures to the Extreme
NIO's Shenji NX9031 adopts the 5nm automotive-grade process, featuring over 50 billion transistors and a 32-core big.LITTLE parallel CPU architecture. The memory bandwidth reaches 546GB/s, nearly twice that of NVIDIA's Thor-U, supporting LPDDR5x memory with a speed of up to 8533Mbps.
In terms of ISP (Image Signal Processor), NIO has chosen an in-house development route, achieving a pixel processing capability of 6.5G per second and keeping image processing latency within 5 milliseconds. The total computing power of a single chip is 1000 TOPS, equivalent to the combined performance of four NVIDIA Orin-X chips (254 TOPS each). According to information from NIO's Q1 2026 earnings call, over 250,000 Shenji NX9031 chips have been delivered. BYD's Xuanji A3 adopts the 4nm process, and officially claims it is China's first 4nm automotive-grade autonomous driving chip. The Xuanji A3 is BYD's 567th automotive-grade chip, equipped with a 16-core CPU reaching 420K DMIPS, and a 3-core NPU, natively supporting Transformer large models.
The computing power of a single chip is approximately 700 TOPS, with a memory bandwidth of 273GB/s. The power consumption per unit of computing power is 20% lower than that of comparable products, and the computing power utilization rate is 100% higher than the industry's conventional level. The functional safety level even reaches ASIL-D, supporting L3 and L4 autonomous driving. Wang Chuanfu, Chairman of BYD, emphasized at the launch event that the technical difficulty of automotive-grade 4nm is equivalent to the 2nm level in the consumer electronics field.
In terms of application solutions, a single vehicle is equipped with three Xuanji A3 chips working collaboratively, with the total computing power of the whole vehicle exceeding 2100 TOPS. It adopts a 2-primary-1-backup safety redundancy architecture, which can meet the high requirements for computing power and reliability in L3 and L4 autonomous driving.
The routes of NIO and BYD share similarities; both involve deep customization and optimization on mature chip architectures, leveraging process advantages and large-scale integration to enhance performance. NIO excels in the perception enhancement brought by its in-house ISP, while BYD excels in the power consumption control of the 4nm process and the computing power stacking of three-chip collaboration. This route also carries certain risks; when the industry's mainstream architecture undergoes a generational shift, the massive upfront investment may not be recovered.
02. Li Auto Forges a New Path from the Underlying Architecture
Li Auto's Mach M100 has taken a completely different path from the two mentioned above. This chip also adopts the 5nm automotive-grade process, with a single-chip computing power of 1280 TOPS. On the CPU side, it is equipped with a 24-core ARM Cortex-A78AE processor cluster and 8-channel LPDDR5X memory, with a peak bandwidth of 273GB/s.
What truly sets the Mach M100 apart is its dataflow architecture. Traditional autonomous driving chips adopt an instruction-driven mode, where computing units need to constantly fetch data from global memory; the larger the model scale, the more prominent the fetching bottleneck becomes. The Mach M100, however, adopts a data-driven mode, where data flows within the chip, triggering computation wherever it flows. This is equivalent to removing the translation layer introduced to accommodate human programming, significantly improving transistor utilization and achieving an actual operational efficiency of 82%. Xie Yan, CTO of Li Auto, stated that there is no off-the-shelf IP to refer to for this chip.
The architecture of the Mach M100 has been comprehensively reconstructed around five core principles, including the dataflow execution model, cache-less memory hierarchy, and tensor-granularity ISA. It adopts a fully redundant architecture with dual SoC (System on Chip), dual MCU (Microcontroller Unit), and dual power supplies, meeting the highest ASIL-D functional safety level. The architecture paper for this chip was selected for ISCA 2026, the top international conference on computer architecture, making Li Auto the first Chinese automaker to be selected and present on stage since ISCA established its industry track in 2020. The Mach M100 was initiated in November 2022 and achieved mass production and vehicle integration in May 2026 after three and a half years of development.
The advantage of the dataflow architecture lies in fundamentally resolving the data fetching bottleneck during large model inference, making it more suitable for the continuous iteration of end-to-end autonomous driving algorithms. However, this also means that Li Auto needs to complete full-stack in-house development from the chip and compiler to the operating system, with technical difficulty and engineering complexity far exceeding optimization on mature architectures. But as long as this path succeeds, Li Auto's chip capabilities will be deeply coupled with its algorithms, which is absolutely impossible to achieve with off-the-shelf purchased chips.
03. Cost Reduction or Overcapacity: Which is the Truth?
The most direct reason for the rush of automakers into chip-making is cost. Ma Lin, Vice President of NIO, publicly revealed at the 2026 China Automotive Chongqing Forum that NIO's previous expenditure on purchasing NVIDIA chips had reached as high as $300 million. After the integration of the in-house Shenji chips, compared to the previous solution of using four NVIDIA Orin chips per vehicle, the autonomous driving hardware cost per vehicle has been reduced by approximately 10,000 RMB. Estimated based on 2025 sales, the annual cost savings exceed 1.8 billion RMB. BYD, on the other hand, possesses a manufacturing system covering the entire chip process, with a chip R&D team of over 7,000 people and a cumulative investment of over 100 billion RMB.
Supported by this scale, the mass production of the Xuanji A3 is expected to further lower the hardware cost of BYD's high-end autonomous driving vehicles. From another perspective, the investment in in-house chips is equally non-negligible; the R&D cost for a single 5nm automotive-grade chip can exceed $400 million, and tape-out costs can reach tens of millions of dollars.
Furthermore, it usually takes two to three years from project initiation to mass production for a chip, during which algorithms and requirements may have already changed. More crucially, it is the economies of scale; if the annual sales volume is not large enough, the amortized cost per chip may be far higher than that of purchasing externally.
Zhu Jiangming, founder of Leapmotor, stated at a launch event in June 2026, "For AI autonomous driving chips, there is simply too much overcapacity." He cited a figure that the total annual market demand is only 10 to 20 million units, while there are currently 14 AI autonomous driving chips available on the market, covering solutions from Qualcomm, NVIDIA, Huawei, as well as NIO, XPeng, Li Auto, BYD, Geely, and others.
Leapmotor once took the lead in launching its in-house chip, Lingxin 01, in 2019 and achieved mass production for vehicle integration, but later chose to discontinue this route. Zhu Jiangming's judgment is that before reaching a scale like Toyota's, the return on investment for in-house chips is not cost-effective. Leapmotor's logic has its rationality, but the choices of NIO, Li Auto, and BYD represent another consideration.
All three—NIO, Li Auto, and BYD—regard AI capabilities as the core competitiveness of their brands. As the physical foundation of AI computing, the architectural design of chips directly determines how fast and how well the algorithms can run. Purchased chips can only passively adapt, whereas in-house chips can customize computing units, memory bandwidth, and data pathways according to their own algorithms. Xie Yan, CTO of Li Auto, also raised a similar viewpoint: "If an automaker takes AI as its core competitiveness, developing in-house AI chips is a must-do task." The efficiency improvement brought by this software-hardware synergy cannot be simply measured by TOPS figures.
04. Final Thoughts
The boom in automakers developing in-house chips is essentially the result of the competition in smart vehicles sinking from the application layer to the foundational layer. When the differences in vehicle experience are increasingly determined by the collaborative efficiency of chips, algorithms, and operating systems, leading automakers find it hard to tolerate having key computing units constrained by external suppliers. NIO and BYD have chosen to go deep and thorough on mature architectures, while Li Auto has chosen to start from scratch with a dataflow architecture. Both routes have their own pros and cons, and each bears different risks. However, when almost all leading automakers are developing in-house autonomous driving chips and the total market demand is relatively limited, the waste of resources caused by redundant investments is objectively existing.
It is foreseeable that the only players who will ultimately emerge from this chip-making race are those with sufficiently large annual sales, clear technological routes, and the ability to deeply bind chip capabilities with algorithm capabilities. The rest will most likely choose to return to the embrace of suppliers at some point.
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