On October 9, ESWIN Computing was listed on the Main Board of the Hong Kong Stock Exchange, becoming the capital market's first "pure" RISC-V chip investment target. Since its invention in 2010, the technical advantages and application prospects of RISC-V have been verified. With over 25 billion core shipments (data from RISC-V International) and approximately 6.9 billion SoC (System on Chip) shipments in 2025 (data from SHD Group), it has joined the ranks of the world's mainstream computing architectures.
But why is it only now that chip companies centered on RISC-V are beginning to be accepted by the capital market? From the perspective of market trends, AI inference scenarios require a computing foundation that aligns with specific businesses, features low Token costs, and has low complexity. This demand has allowed the capital market to see the potential of RISC-V. From the perspective of RISC-V itself, over the past 16 years, the industry has actively promoted proof of concept, product implementation, and the formulation of standards in high-performance fields such as RVA23 and Server Platform 1.0. The focus will now shift to "commercial realization". The listing journey of ESWIN Computing may become an important sample of RISC-V moving from "technical feasibility" to "commercial feasibility".
The "Three Axes" to Promote RISC-V Commercialization
Currently, the focus of the RISC-V industry is shifting from "is it easy to use" and "can it be used" to more practical topics such as "how to achieve large-scale commercial use of products" and "how enterprises can achieve commercial success". ESWIN Computing, established 7 years ago, has already delivered a quite rich answer in the process of RISC-V commercialization. As of March 31, 2026, ESWIN Computing has commercialized over 150 products and served 220 customers globally, which is closely related to its choices in technology routes, market entry points, and delivery logic.
Open source, openness, flexibility, and customizability are the core advantages of the RISC-V architecture. However, the imperfect ecosystem also leads to high development and adaptation thresholds for RISC-V, invisibly increasing the difficulty of product implementation. Addressing industry pain points, ESWIN Computing has built a "reusable" technical system—using IP modules as basic units to form a scalable and recyclable business model. IP modules are equivalent to pre-designed, verified, and reusable functional "building blocks" in chip design. A standardized, modular, and easily reusable IP module resource library, combined with RISC-V's own modular design concept, can better respond to the rapidly iterating chip product demands in fields such as smart terminals, embodied AI, and intelligent computing, thereby improving development efficiency.
As of March 31, 2026, ESWIN Computing has accumulated over 620 IP modules and more than 20 serialized RISC-V cores, forming a triple reuse of technology, customers, and supply chain resources. In terms of technology, its self-developed IP modules can be shared and reused across multiple products, helping to reduce R&D costs and increase efficiency. At the customer level, the cost of customer acquisition is reduced through the promotion and scaled use of multiple products by the same customer. On the supply chain end, synergistic effects are fully leveraged to form a virtuous cycle of decreasing marginal costs and value growth.
The choice of commercial scenarios is particularly crucial for RISC-V, this "latecomer" instruction set. The open-source, open, and scalable characteristics of RISC-V give it stronger scenario customization and adaptation capabilities. However, blindly expanding the product line still carries the risk of being squeezed by mature instruction sets or falling into homogeneous competition. In choosing market entry points, ESWIN Computing takes into account both its own resource endowments and the natural advantages of RISC-V, gradually expanding its product matrix in combination with the latest market demands. Founder Wang Dongsheng, former Chairman of Jingdongfang, is deeply familiar with the semiconductor needs and technology trends of the display industry. At the very beginning of the establishment of ESWIN Computing, human-computer interaction chips (chips supporting screen-related input/output functions) were set as one of the product implementation directions. Such chips have relatively low ecosystem dependence and high customization requirements, building a basic market for ESWIN Computing. According to Frost & Sullivan industry data, measured by 2025 revenue, ESWIN Computing is China's largest domestic smart terminal human-computer interaction chip product provider. On this basis, ESWIN Computing continues to expand its business map by combining the latest scenarios such as smart terminals, automotive electronics, industrial control, embodied AI, and edge computing, forming a product matrix covering human-computer interaction chips, multimedia processing chips, interconnect chips, computing chips, and solutions.
Computing chips mainly based on MCU (Microcontroller Unit) and AI SoC (System on Chip) are rapidly rising as the second engine of ESWIN Computing, with their revenue contribution already "on par with" that of human-computer interaction chips.
As the performance of RISC-V chips continues to improve, the key to their commercial implementation is shifting from single-point performance to the toolchain and software layer. When inference workloads become the main AI workload, how to make the chips quickly "run" in users' real businesses and achieve flexible deployment is the key to the commercial implementation of RISC-V. ESWIN Computing has built full-stack in-house capabilities covering CPU cores, NPUs, bus interconnects, security, software toolchains, and AI compilers, forming a delivery model from underlying hardware to upper-layer toolchains. For example, its launched AI accelerator card combines four AI SoC chips with host-side SDKs, cloud management platforms, inference frameworks, and model development and deployment toolchains. This "chip + toolbox" delivery method can reduce users' underlying adaptation and technical debugging costs, provide more convenient deployment support, and reserve space for running large models locally.
Positioning in the AI Inference Era with "RISC-V+AI"
Since ChatGPT became popular in 2022, the computing volume for AI training has grown at a rate of about 5 times per year. Starting in 2025, as the industry focus shifts to "how to put AI to use", coupled with the explosive popularity of AI agents, AI inference demand has shown exponential growth. Its proportion in AI workloads is gradually surpassing AI training and will occupy a dominant position in computing power consumption for a long time.
Compared to AI training's pursuit of peak computing power, VRAM bandwidth, and cluster interconnects, inference scenarios place more emphasis on the energy efficiency ratio, low latency, low cost, and deployment flexibility of chips. This change opens up space for architectural innovation. Relying on advantages such as open source, customizable instructions, and high heterogeneous integration, RISC-V can better adapt to complex computing needs such as model inference, AI agent logic decision-making, and task scheduling. It is expanding from the embedded field to high-performance computing and AI acceleration scenarios, and is known as the native computing architecture in the AI era.
"RISC-V+AI" is the technology route that ESWIN Computing has adhered to for a long time. Based on the evolution trend of the "device-edge-cloud" intelligent industry, ESWIN Computing continuously promotes the collaborative optimization of computing power and algorithms, connects the adaptation link between chip computing power and intelligent models, enables hardware platforms and algorithms to form systematic support, and extends new growth curves around human-computer interaction, embodied AI, edge computing, and intelligent computing centers.
In the AI implementation period, human-computer interaction is no longer just the interaction between humans and screens, but a broad entry point for AI to enter smart terminals. The human-computer interaction chip business, as the basic revenue base of ESWIN Computing, will gain new market space.
Embodied AI, as the carrier for AI to enter the physical world, is in a stage of rapid volume growth. ESWIN Computing has launched chips and solutions for lightweight SoC, MCU (Microcontroller Unit), image processing, communication, and motor control, covering fields such as service robots, collaborative robots, smart hardware, and industrial automation. Compared to single-point chip manufacturers, ESWIN Computing responds to the integrated needs of robots for perception, control, communication, and computing with multi-chip collaborative solutions, helping complete machine enterprises shorten development cycles, optimize system performance, and reduce complete machine costs.
AI agents require a highly coordinated "cloud-edge-device" architecture. While stabilizing the "device" as its "traditional strength", ESWIN Computing is also extending to edge computing and intelligent computing center AI chips, facing scenarios such as large model inference, intelligent computing, and edge servers, and seeking differentiation in energy efficiency ratio, cost structure, and independent innovation. This not only opens up long-term growth space for it but is also a key move in its upgrade from a terminal chip enterprise to a platform-based computing chip enterprise. Currently, the company has completed the adaptation and verification of domestic large models such as DeepSeek on its self-developed RISC-V platform. The world's first RISC-V architecture AI NAS jointly launched with Jikongjian is equipped with a self-developed edge computing chip, integrating RISC-V CPU and NPU. It can run AI tasks such as portrait recognition and natural language search, and supports local deployment of large models. It is expected to be mass-produced in the fourth quarter of 2026.
While expanding its RISC-V computing power layout, ESWIN Computing also opens its own capabilities to the industry. Its built RISAA (RISC-V+AI) ecosystem technology platform deeply integrates the RISC-V computing architecture with AI technology, providing developers with chips, chipsets, and boards, and collaborating with industry chain partners to promote the implementation of RISC-V in various vertical scenarios. ESWIN Computing also took the lead in proposing the RDI concept (RISC-V Digital Infrastructure), emphasizing the guidance of real scenarios and user needs, and took the lead in establishing the RDI Synergy Alliance to accelerate the ecosystem construction and commercialization process of the RISC-V industry chain.
Although the commercialization capabilities of domestic RISC-V enterprises such as ESWIN Computing are gradually strengthening, there is still room for breakthroughs in the profitability path. In terms of revenue, ESWIN Computing's revenues from 2023 to 2025 were CNY 1.752 billion, CNY 2.025 billion, and CNY 2.431 billion respectively, with a three-year compound growth rate of about 17.8%. However, R&D investment, which once reached 82.5% of revenue, has led to its failure to achieve profitability. As ESWIN Computing officially enters the capital market and obtains broader capital support, the market's focus on it is shifting from revenue data to long-term positioning capabilities. When AI inference and AI agents redefine the computing industry, and when RISC-V enterprises officially step onto the capital track, a new round of development centered on RISC-V commercial realization and ecosystem co-construction has officially set sail.
Author | Zhang Xinyi
Editor | Wu Lilin
Art Editor | Ma Liya Supervisor | Lian Xiaodong