Author | Chen Junda Editor | Mo Ying
The competition for AI computing power occurs not only within chips but also between them. No matter how high the peak computing power of a single chip is, it does not mean that a cluster composed of hundreds or thousands of chips can deliver corresponding performance. Whether data can be transmitted at high speeds and whether computing, storage, and networks can collaborate efficiently will both affect the actual performance of the entire system. As AI clusters grow increasingly large, interconnection is no longer just a supplementary link for connecting hardware, but a crucial factor determining whether computing power can be fully unleashed. Facing this challenge, how exactly should domestic interconnect vendors break through?
Today, Stars Micro System Technologies, a relatively low-key Wuxi-based vendor that has been deeply engaged in the domestic interconnect chip track for six years, unveiled its full-scenario high-performance interconnect chip platform for the first time at its brand and full-stack product launch event. The platform is laid out around general-purpose computing interconnection and intelligent computing interconnection, covering multiple key scenarios such as storage, networking, IO expansion, and AI cluster interconnection. Currently, Stars Micro System's products have a cumulative shipment volume of over 800,000 units and have been integrated into the products and solutions of enterprises such as Inspur, Lenovo, H3C (New H3C), and ZTE. At the launch event, Stars Micro System also signed strategic agreements with seven industry partners: Kylin, UnionTech, Tencent Cloud, Inspur, H3C, ZTE, and Lenovo, to jointly promote the collaborative adaptation of interconnect chips with operating systems and complete machine platforms, and accelerate the implementation of domestic high-performance interconnect solutions.
In the high-end interconnect market where overseas vendors have long held the advantage, what enables this domestic vendor to win the recognition of top customers? As one of the few domestic interconnect chip companies with a full-stack layout from core IP and chip R&D to software, hardware, and system adaptation, Stars Micro System's development also provides a noteworthy sample for observing how domestic vendors can break through the advantages of overseas enterprises in the high-end interconnect market.
01.Computing System Selection Cannot Rely Solely on Single-Point Performance
For computing power infrastructure builders, purchasing interconnect chips is not simply about comparing parameters such as bandwidth and latency, but about determining whether the products can meet actual business needs and run stably in complex systems. In AI clusters, computing hardware is responsible for executing computing tasks, but the data generated during training and inference needs to flow continuously between computing devices, storage systems, and networks.
If the interconnect bandwidth is insufficient, the transmission latency is too high, or the communication efficiency between multiple devices is not ideal, it may lead to computing resources waiting for data, thereby affecting hardware utilization efficiency. Stars Micro System summarizes the effective computing power of a cluster as single-point computing power × scale × interconnect efficiency. Starting from the cluster as a whole, this formula presents the multiple performance influencing factors of computing power infrastructure and also provides a reference perspective for enterprises to evaluate interconnect solutions.
Different application scenarios also have different focuses on the requirements for interconnect products. In AI clusters, the communication efficiency between devices is directly related to the execution of large-scale computing tasks; in cloud computing and storage systems, network throughput, IO performance, and response latency respectively affect data transmission, storage access, and business processing efficiency. With different scenarios, the performance indicators that enterprises focus on during selection will also vary, but ultimately, the products need to be placed in actual systems for comprehensive evaluation. Beyond performance indicators, there are three other factors affecting whether interconnect products can truly enter enterprise-level applications.
First is operational reliability. For enterprise-level computing power infrastructure, achieving performance indicators in the laboratory is only the first step in meeting requirements.
Facing complex workloads and long-term operation, whether the product can maintain stability and ensure data transmission is also an important consideration for customers during selection.
Second is compatibility and adaptation capability. Interconnect chips not only need to meet corresponding interface and protocol requirements but also need to work collaboratively with different CPU platforms, operating systems, hard drives, optical modules, communication libraries, and complete machine architectures. The broader the adaptation range and the more sufficient the verification, the lower the difficulty for customers to integrate the products into existing systems.
Third is mass production maturity and continuous delivery capability. For server OEMs and infrastructure builders, the completion of chip design and bring-up does not mean that conditions for large-scale application have been met. Whether it can achieve stable mass production, continuous supply, and provide subsequent technical support and product iteration determines whether customers can continuously deploy and upgrade systems. From this perspective, the competition in high-performance interconnect chips involves not only the performance of the chips themselves but also the reliability, adaptation efficiency, and continuous supply capability of the products in real systems. For customers, what ultimately needs to be evaluated is not whether a single parameter is leading, but whether the entire interconnect solution can meet business needs and support long-term system operation.
02.From Single-Point Products to Full-Scenario Supply: How Does Stars Micro System Meet Different Needs?
To meet the needs of computing systems in terms of performance, reliability, compatibility, and continuous delivery, interconnect chip vendors need to have product capabilities covering different application scenarios. Stars Micro System divides its product layout into two major directions: general-purpose computing interconnection and intelligent computing interconnection. The former covers storage, networking, and IO expansion needs in servers and storage systems, while the latter faces the new generation of AI infrastructure, laying out products such as high-speed PCIe switches, InfiniBand networks, and multi-protocol AI NICs. From basic interconnection to high-speed interconnection for AI clusters, Stars Micro System has launched 12 mass-produced products, covering data transmission needs at different levels of computing systems.
In general-purpose computing scenarios, Stars Micro System has created products such as HBA cards, RAID cards, RoCE NICs, and PCIe switch chips around storage, networking, and IO expansion. Among them, HBA cards mainly face the connection needs between hosts and storage devices, while RAID cards involve storage organization, IO processing, and data protection. At the launch event, Stars Micro System disclosed that its RAID products use self-developed chips and firmware, and are collaboratively optimized through strategies such as data algorithms and intelligent IO interrupt aggregation, targeting application scenarios such as databases and high-redundancy storage. The read performance of this product is on par with the solutions of Broadcom, a leading international interconnect vendor. In a 16-disk RAID 5 configuration with a 256KiB sequential write test, its write bandwidth achieved a performance advantage of up to 47%.
The performance parameters of its multi-mode RAID chip were also disclosed at the launch event: both data transmission bandwidth and IOPS have been increased to about 8 times that of the previous generation products, which is about twice the performance of advanced overseas products.
In terms of networking, Stars Micro System has launched 10G, 25G, and 100G NICs to meet the needs of high throughput, low latency, and RDMA networks. In terms of IO expansion, Stars Micro System's PCIe switch chip adopts a self-developed CrossBar architecture, supports non-blocking switching, and is compatible with communication libraries such as NCCL, RCCL, MCCL, and ECCL. Its actual measured performance can directly replace Broadcom's PEX89104 chip. These products correspond to needs such as storage access, network transmission, and device expansion, jointly forming Stars Micro System's product portfolio in the field of general-purpose computing interconnection.
In the field of intelligent computing interconnection, Stars Micro System has laid out products such as PCIe switch chips, 400G IB NICs, and IB switch chips. Among them, PCIe switch chips are used to expand the connection and data exchange capabilities between multiple GPUs, while 400G IB NICs and IB switch chips face high-bandwidth, low-latency cluster networks. At this launch event, Stars Micro System further introduced the PCIe 6.0 Switch and 800G multi-protocol AI NIC, extending its product layout to higher-bandwidth device interconnection and network communication scenarios. The C82-4G chip released by Stars Micro System this time is the first domestic PCIe 6.0 Switch. This product supports up to 144 lanes of PCIe 6.0, with a single-lane transmission rate reaching 64 GT/s, doubling that of PCIe 5.0.
As the number of computing devices such as GPUs in AI servers increases, the system not only requires higher-bandwidth device connections but also a more flexible interconnect architecture. While improving single-lane bandwidth, the C82-4G also supports Fabric networking and CXL memory pooling capabilities, providing support for multi-GPU expansion and more complex computing system architectures. Another key new product is the 800G multi-protocol AI NIC, which is also the first of its kind domestically. This product integrates a 48-lane PCIe Gen6 Switch, is deeply adapted to Hygon CPUs and the next-generation supernode Compute Tray architecture, supports protocol offloading such as RoCE v2 and VeRoCE, and features hardware-level packet-by-packet spraying, out-of-order reassembly, selective retransmission, and programmable congestion control capabilities.
Compared with the existing 400G IB NICs and IB switch chips, this new product further increases the network bandwidth to 800G, supports both IB and RoCE dual modes, and can integrate PCIe switching capabilities, targeting the needs of next-generation supernodes for high-bandwidth, low-latency communication. From general-purpose computing to intelligent computing, different scenarios have different requirements for interconnect performance, protocols, and system architecture.
For OEMs, how to enable efficient collaboration among storage, networking, and computing devices while meeting the hardware configuration and deployment needs of different customers is an important topic in system design. Stars Micro System's products covering multiple interconnect links also provide more choices for complete machine design and system integration. For cloud computing and AI infrastructure customers, this means they can combine their own computing power scale, system architecture, and business needs to select more matching interconnect solutions, meeting current deployment needs while reserving space for subsequent expansion and architecture upgrades.
03.Over 400,000 Chips Shipped in One Year: Core IP Achieves Independent and Controllable Status
From the large-scale shipment of existing products to the layout of a new generation of high-bandwidth chips, Stars Micro System is continuously expanding its product boundaries. Supporting this layout is not only continuous R&D investment but also market-tested products, large-scale delivery experience, and ecological adaptation capabilities for different software and hardware platforms. Previously, Stars Micro System had been relatively low-key in the industry. In fact, Stars Micro System has established a large-scale R&D system with over 1,000 R&D personnel, of which technical personnel account for more than 90%. It has set up eight R&D centers in Wuxi, Tianjin, Hefei, Changsha, Chengdu, Shenzhen, Xi'an, and other places.
In terms of technological R&D, Stars Micro System adheres to the self-development of core IP and architecture, continuously investing in key technologies such as high-speed interfaces, low-latency forwarding architectures, and high-speed SerDes, and constantly promoting product iteration.
In terms of reliability, Stars Micro System has built a RAS mechanism covering the entire link, and improves product stability and reliability through technologies such as end-to-end data protection, redundant design, and automatic fault switching. At the same time, its products are manufactured using domestic processes, and an independent and controllable technical system has been formed from core IP and chip architecture to the supply chain.
Facing the construction of next-generation computing power infrastructure, Stars Micro System has also laid out key technologies such as optical interconnection, high-speed SerDes, and storage pooling, promoting the evolution of domestic high-performance interconnection towards higher bandwidth and lower latency. However, whether technological accumulation can be transformed into market competitiveness still depends on whether the products can withstand the test of large-scale applications. Data disclosed by Stars Micro System shows that in 2025, its cumulative shipment volume of all products exceeded 400,000 units, and sales exceeded CNY 1 billion. Since its establishment, its cumulative shipment volume of all products has exceeded 800,000 units, including over 100,000 NICs, over 400,000 storage cards, and over 300,000 switch chips.
In industry applications, Stars Micro System's HBA and NIC products have been deployed on a large scale of nearly 100,000 units in operator-related businesses and have been running stably in related network cloud scenarios for more than 18 months. The storage architecture implemented based on RAID products can meet the microsecond-level latency and million-level IOPS concurrent processing capabilities of the financial industry. Relying on the advantage of full-stack domestication, more than 50,000 units have been deployed on a large scale.
Stars Micro System revealed that the DPPM (Defective Parts Per Million) of its chip products is less than 100, meaning that the number of returned units is less than 100 per million chips. After analyzing these chips, they found that none of the issues were caused by the chips themselves.
At the same time, interconnect chips need to work collaboratively with supporting components such as servers, CPUs, operating systems, storage, and networking. Platform compatibility and ecological adaptation capabilities also affect product deployment efficiency. Stars Micro System has currently completed adaptation to seven major mainstream CPU platforms and cooperated with over 15 mainstream computing chips, over 15 mainstream cloud platforms, more than 50 operating system partners, and over 300 hard drive and optical module partners, establishing an ecological cooperation network covering multiple software and hardware links.
For the domestic high-performance interconnect chip industry, independent and controllable core technology is the foundation, while large-scale shipment, stable operation, and compatibility and adaptation in complex software and hardware environments determine whether products can truly enter computing power infrastructure. Stars Micro System has formed a complete capability system covering independent R&D, reliability design, large-scale delivery, and ecological adaptation. It can not only provide independent and controllable interconnect chip products but also has large-scale shipment and actual deployment experience as support. It is rare for domestic vendors to possess the above capabilities simultaneously, which also constitutes Stars Micro System's differentiated advantage in the domestic high-performance interconnect chip market.
04.Conclusion: Can Domestic Interconnect Chips Produce a "Chinese Broadcom"?
Globally, the competitiveness of leading interconnect vendors such as Broadcom comes not only from single chips but also from long-accumulated product systems, technological capabilities, and customer ecosystems. For Stars Micro System, to become a representative high-performance interconnect vendor in China's computing power industry chain, it still needs to continuously undergo tests in more advanced product iteration, complex scenario verification, and large-scale commercial applications.
However, from full-stack layout to large-scale delivery, Stars Micro System has already demonstrated the foundation and potential to develop in this direction. Whether domestic interconnect chips can grow into an enterprise with Broadcom-style comprehensive competitiveness will also be a noteworthy highlight in the process of autonomous development of China's computing power industry chain.