Introduction
Imagine equipping an intelligent robot with a "brain." It not only requires millisecond-level precise control of its muscles (joint motors) and real-time perception of the surrounding environment, but also needs to smoothly run AI large models with tens of billions of parameters locally—what kind of chip architecture would this require? In the past, this field was almost monopolized by NVIDIA's closed-loop GPU ecosystem. Today, however, domestic chips based on the open-source RISC-V architecture are initiating a "brain revolution."
This article will conduct an in-depth analysis of two chips from SpacemiT, a domestic IC design company based on the RISC-V architecture, including:
Comparing the core architecture, computing power metrics, and power consumption characteristics of the K1 and K3 chips.
Evaluating the adaptability of the K3 "AI CPU" architecture in scenarios such as real-time control, perception computing, and large model inference for embodied intelligent robots.
Analyzing the advantages and challenges of RISC-V chips in breaking through NVIDIA's CUDA barriers and addressing domestic supply chain security.
Revealing SpacemiT's competitive strategies and development roadmap in the segmented markets of commercial services, industrial collaboration, and humanoid robots.
Hardware Architecture and Performance Benchmarking: The Technological Leap from K1 to K3
In the track of embodied intelligence, chips are not only "computing engines" but also the "nerve centers" for robots to cope with complex changes in the physical world. Through its two generations of K1 and K3 chips, SpacemiT has demonstrated the leap from traditional edge computing to on-device large model AI CPUs.
K1: The Cornerstone of Lightweight Edge Control
Based on the RVA22 standard, the K1 chip adopts an 8-core SpacemiT X60 architecture. Instead of blindly stacking independent NPUs, it ingeniously integrates a 256-bit RISC-V Vector LRVV 1.0M extension and a Matrix Multiplication Engine (IME) within the CPU. This design enables K1 to deliver 2.0 TOPS of AI computing power at an ultra-low power consumption of 10W. Moreover, K1 features a dedicated on-chip real-time subsystem (RCPU) with integrated CAN-FD and PWM control, making it inherently suitable as the "cerebellum" controller for mobile robot chassis.
K3: The On-Device AI CPU Behemoth Compliant with RVA23 Specifications
If K1 is the precise "cerebellum," then K3 is the synergistic hub integrating both the "brain" and the "cerebellum." As the first high-performance AI CPU compliant with the RISC-V RVA23 specification, K3 adopts an innovative "8+8" heterogeneous-homogeneous architecture:
• 8 X100 high-performance big cores: Clocking up to 2.4GHz, providing up to 130 KDMIPS of general-purpose computing performance, with single-core performance comparable to Arm Cortex-A76;
• 8 A100 intelligent computing cores: Equipped with a 1024-bit wide RVV 1.0 vector unit, natively supporting FP8/FP4 high-precision AI inference, with computing power surging to 60 TOPS (sparse computing power).
Why an "AI CPU"? — The Magic of Eliminating Bus Transmission
Traditional chip architectures often adopt a "CPU + external NPU" form. This is like a boss (CPU) who has to write a note and send it to the accounting room next door (NPU) every time they want to calculate accounts; the bus transmission in between is like congested traffic, bringing huge latency and power consumption. In contrast, K3's "AI CPU" architecture integrates AI matrix computing directly into the CPU instruction flow, enabling unified memory sharing (supporting up to 32GB/64GB LPDDR5 with a bandwidth of up to 51 GB/s). This allows K3 to smoothly run 30-billion to 80-billion parameter embodied intelligence large models (such as VLA Vision-Language-Action models) locally, achieving inference speeds of 10-15 Tokens/s!
Competitive Strategy: Directly Confronting the Jetson Orin Nano
In benchmarking against the industry standard NVIDIA Jetson Orin Nano (8GB, 67 TOPS), K3 demonstrates unique differentiated competitive advantages: Although the Orin Nano has extremely high memory bandwidth, it is limited by its 8GB capacity, making it difficult to carry massive models above 7B; K3, relying on its 32GB/64GB large unified memory, makes up for the "memory wall" shortcoming in on-device large model inference. Furthermore, K3's CoM260 core board is fully compatible in hardware pinout with the Jetson Orin series, achieving a seamless drop-in replacement!
Full-Stack Software Ecosystem and Open-Source Developer Ecosystem
Hardware determines the baseline of a chip, while the software ecosystem determines its ceiling. Today, with NVIDIA building a deep and high wall relying on CUDA, how has SpacemiT forged a path to break through via open-source and hardware-software collaboration?
Bianbu OS and Native AI Compiler Toolchain
SpacemiT has created its self-developed Bianbu software stack. Bianbu OS is deeply optimized based on the Linux community (the mainline Linux Kernel 6.14/6.18 has officially introduced support for SpacemiT chips), with built-in Python 3.12 and a customized PyTorch 2.8. A more critical breakthrough lies in the AI compiler—traditional NPU chips highly rely on proprietary model conversion tools, and encountering new operators will lead to compilation failure and fallback to CPU execution. K3, however, supports native Triton 3.6 and TileLang compilers, paired with the FlagGems operator library, allowing developers' PyTorch code to be seamlessly translated into RVV 1.0 vector instructions, achieving "what you see is what you get" for large model deployment.
Dual Engines of Robot Middleware and RTOS
Embodied intelligent robots need to balance the high-throughput decision-making of the "brain" and the microsecond-level real-time response of the "cerebellum." Bianbu OS deeply integrates ROS 2 (Humble/Jazzy) and seamlessly connects to the hard real-time subsystem running FreeRTOS via the DDS-XRCE protocol (K3 has a built-in dual-core RT24 real-time core). This "Linux + RTOS" hardware-level isolation architecture, paired with a self-developed APIC interrupt controller, ensures that the latency jitter of sensor data acquisition and servo control commands is strictly locked at the microsecond level.
Ecosystem Circle and Hardware Implementation Cases
Open-source is the biggest catalyst for RISC-V. SpacemiT has publicly released the spacemit-robotics code repository, covering reference designs such as bipedal humanoid robots (Humanoid Linglong) and desktop robots (Reachy Mini). On the industrial side, the open-source humanoid motion control framework OpenLoong from the National and Local Co-built Humanoid Robot Innovation Center (Guodi Center) has been fully adapted to the K3 chip; bipedal robots equipped with SpacemiT controllers have successfully completed outdoor running tests in the extremely cold environment of -47.4℃. Meanwhile, hardware giants such as Sipeed (launching K3 Pico-ITX), Firefly, and Banana Pi have also successively launched development boards equipped with K3, driving the rapid explosion of the open-source ecosystem.
Segmented Market Demands and Scenario Adaptation for Embodied Intelligence
Embodied intelligence is by no means a single form; different tracks have vastly different requirements for computing power, power consumption, interfaces, and cost. How do the K1 and K3 chips position their best roles in these segmented battlefields?
1. Humanoid Robots: The High-End Main Control Stage for K3
Humanoid robots are hailed as the "crown jewel" of embodied intelligence. They require the lower body to maintain high-frequency dynamic gait control below 1ms, and the upper body to possess real-time Vision-Language-Action (VLA) model perception capabilities.
• Adaptability: The K3 chip perfectly fits this requirement in a "single-chip" posture—8 X100 big cores paired with the RT24 real-time core handle the high-frequency motion control of the lower body, while 8 A100 intelligent computing cores and 32GB of large memory handle the Agent logical decision-making of the upper body. It also provides 10 channels of CAN-FD and TSN Gigabit Ethernet ports to directly connect to all joint motors of the robot.
2. Industrial Collaborative Robots (Cobots): Precision Control and Visual Guidance
Industrial collaborative robot arms focus on multi-axis trajectory planning, collision detection, and fieldbus synchronization (EtherCAT/TSN).
• Adaptability: Relying on its 8-core CPU and on-chip RCPU, the K1 chip is sufficient to easily cover the hard real-time motion control of standard 6-7 axis robot arms; whereas K3 is suitable for high-end intelligent collaborative arms that integrate 3D visual guidance for grasping and on-device autonomous planning.
3. Commercial Services and Logistics AMR/AGV: K1's Mature Base and K3's High-End Upgrade
Commercial cleaning, delivery, and inspection robots have strong demands for multi-sensor fusion and LiDAR SLAM mapping, with power consumption requirements limited to 10W-20W and high cost sensitivity.
• Adaptability: The K1 chip has achieved large-scale mass production and shipment of over 150,000 units, securing a solid cost-performance advantage in mobile chassis and lightweight service robots; K3 precisely penetrates the high-end commercial service robot market that requires high-frame-rate 3D semantic SLAM and complex human-machine interaction.
4. Education, Scientific Research, and Desktop Agents: The First Choice for Open-Source Makers
Universities and research institutes require full-featured Linux, native PyTorch, and extremely high scalability. The K3 Pico-ITX motherboard provides research teams with an ultimate lightweight platform to directly run on-device Agent Runtimes (such as DeepSeek Harness).
Business Model, Pricing Strategy, and Supply Chain Security
Whether a chip can achieve commercial success depends only half on technology; the other half depends on the business strategy, price-performance ratio, and the absolute security of the supply chain.
"Full-Stack RISC-V" Composite Business Strategy
SpacemiT does not merely sell bare chips but adopts a composite model of "self-developed CPU/AI IP + chip sales + System on Module (SoM) + open-source hardware reference design." By eliminating the expensive architecture licensing royalties of Arm (Royalty-free), SpacemiT directly passes the savings in underlying licensing costs to downstream OEMs. Meanwhile, for K3, it launches the CoM260 core board, focusing on full pin compatibility with the NVIDIA Jetson Orin carrier board, allowing customers to complete hardware drop-in replacement under the premise of "zero PCB reconstruction cost."
Breakdown of Price and Cost Structure
• K1 Chip: Positioned in the CNY 100-level market, focusing on high cost-performance. Single-board computers equipped with K1 (such as Banana Pi BPI-F3) have a terminal selling price of only tens of US dollars, greatly reducing the BOM cost of service robot chassis.
• K3 Chip and Modules: The indicative commercial price for a single chip is about $80-$120, far lower than the NVIDIA Jetson Orin Nano ($249) and Orin NX ($599).
• Note: Although the K3 chip itself is highly cost-effective, because the 32GB high-end version requires standard high-frequency LPDDR5 memory, affected by the global memory chip price fluctuations, the overall BOM of initial development kits (such as the K3 Pico-ITX 32GB version at about $595-$639) remains relatively high. Therefore, launching a K3 Lite version with appropriately trimmed memory will be key to further penetrating the lower-tier market.
Mature 12nm Process and Supply Chain Geopolitical Security
In the environment of intensifying semiconductor export controls, supply chain security is the lifeline of complete machine manufacturers. The K3 chip is built using the mature 12nm process. Compared to competitors relying on advanced 7nm/4nm processes, the domestic wafer foundry and packaging/testing capacity at the 12nm node is extremely stable, with a high localization rate of production equipment. Coupled with the fully open-source RISC-V architecture containing no restricted IP from Europe and the US, SpacemiT has built a solid "security windbreak" for the domestic embodied intelligence industry.
Key Risks, Challenges, and Strategic Recommendations
Viewing the competition rationally, SpacemiT still faces non-negligible technical barriers and ecosystem inertia on its path forward.
Core Risks and Competitive Barriers
1. CUDA Ecosystem Barriers and Developer Stickiness: NVIDIA's CUDA ecosystem has over 4 million active developers globally. Mainstream embodied intelligence VLA models are mostly pre-trained on the CUDA platform, and migrating to RISC-V incurs hidden code reconstruction and debugging costs.
2. Energy Efficiency Challenge of the 12nm Process: At 15W-25W power consumption, the 12nm process has a higher thermal density under extreme loads compared to 8nm and more advanced nodes, posing greater challenges to the thermal design of battery-powered small robots.
3. Compiler Dependency of In-Order Execution Architecture: K3 relies on the compiler for static instruction scheduling. During the automatic vectorization compilation of intensive operators, improper selection of the Vector Length Multiplier (LMUL) can easily lead to register spilling and performance degradation.
Strategic Posture and Action Recommendations
• Strengths (S): The native RVA23 AI CPU architecture eliminates the NPU bus bottleneck; integrates hard real-time cores on-chip; royalty-free architecture.
• Weaknesses (W): The overall BOM cost of high-end LPDDR5 boards is relatively high; the accumulation of ecosystem software libraries is not as rich as CUDA.
• Opportunities (O): The national "15th Five-Year Plan" allocates trillions in funds to support embodied intelligence; the explosion of on-device offline inference for local large models; strong demand for domestic supply chain substitution.
• Threats (T): NVIDIA's potential porting of CUDA to the RISC-V platform may bring the risk of marginalizing the main control node; severe fluctuations in memory chip prices.
Action Recommendations:
1. Optimize Hardware Tiers: Launch an 8GB/16GB low-cost K3 Lite derivative version to lower the procurement threshold for non-large model scenarios.
2. Deeply Bind with Industry Leaders: Deepen cooperation with the National Humanoid Robot Innovation Center's OpenLoong, and optimize the MPC and reinforcement learning motion control operator libraries for RVV 1.0.
3. Focus on "On-Device Agent + Robot" Integration: Leverage the first-mover advantage of being the first to run through DeepSeek Harness, and build "local privatized large models + task decomposition + motion control" into a differentiated flagship solution.
4. Accelerate Next-Generation Chip Iteration: Advance the evolution of the X200/A200/N200 architectures (next-generation K7/K9 series), and tackle the challenges of 100+ TOPS computing power and advanced process energy efficiency.
Conclusion
SpacemiT's K1 and K3 chips, based on the RISC-V architecture, represent the cutting-edge trend of the evolution of main control computing platforms for embodied intelligent robots from traditional heterogeneous chips to an "AI CPU" converged architecture. Through the RVA23-compliant X100/A100 architecture, 60 TOPS of on-device AI computing power, 32GB of large unified memory, and a hard real-time subsystem, K3 has successfully broken the memory wall and bus bottleneck, achieving the unique capability of "high-frequency dynamic control + on-device large model inference" on a single chip. Coupled with the mature 12nm process and pin-compatible design, it provides a highly cost-effective and autonomously controllable computing foundation for the embodied intelligence industry.
References:
1. Morgan Stanley Research on Robotics: Humanoid Horizons: Putting the Robots to Work, Oct. 6, 2026
2. Research Report on the Competitive Positioning of SpacemiT's RISC-V-based K1 and K3 Chips in the Embodied Intelligent Robot Application Market
3. Alphasense Report: Competitive Analysis of SpacemiT's K1 and K3 Chips in the Embodied Intelligent Robot Market