On September 20, 2026, the 11th Shanghai FD-SOI Forum, hosted by VeriSilicon, kicked off in Shanghai. Wang Kerui, Executive Deputy General Manager of SimWings, attended the forum and delivered a keynote speech titled "Based on 300mm SOI Substrates, Empowering the Development of the FD-SOI Industry." He comprehensively showcased SimWings' latest progress and strategic layout in the FD-SOI substrate field, and revealed that 300mm SOI has entered mass production, with some products already passing customer certification. The company is currently planning an annual capacity of over 1 million wafers.
What are SOI and FD-SOI?
A standard silicon wafer is made entirely of silicon. In contrast, an SOI wafer is a special silicon wafer with a "sandwich" structure. It consists of three layers:
Top Silicon: The topmost thin layer of single-crystal silicon, where transistors are fabricated.
Buried Oxide (BOX): The middle insulating layer (typically silicon dioxide).
Handle Wafer: The thick silicon base at the bottom, used to provide mechanical support.
Because of the additional insulating "buried oxide" layer in the middle, the SOI wafer cuts off the electrical connection between the top silicon and the handle wafer. This brings three major benefits: it eliminates parasitic capacitance, allowing current to flow faster; it significantly reduces leakage current; and due to the insulation isolation, it is highly resistant to external interference and radiation.
SOI wafers represent a broad category that can be subdivided based on the thickness of the top silicon layer:
RF-SOI: Features a relatively thick top silicon layer (e.g., 75nm), used in mobile phone RF front-ends (switches, antenna tuners);
HV-SOI: Features a very thick top silicon layer (e.g., 3.5μm), used in high-voltage power devices (power management, automotive electronics);
Photonics-SOI: Features a specific top silicon thickness (e.g., 220nm), used in silicon photonics chips (optical communications, data centers);
FD-SOI: Features an extremely thin top silicon layer (typically below 10nm), specifically used for manufacturing fully depleted transistors.
Among these, FD-SOI stands for "Fully Depleted Silicon-On-Insulator." In a standard bulk silicon transistor, the region beneath the current channel is thick silicon, requiring doping for isolation. In contrast, the top silicon layer in an FD-SOI transistor is extremely thin (typically below 10nm), so thin that the entire silicon layer is depleted (which is the origin of the name "fully depleted").
Technical Advantages and Application Ecosystem of FD-SOI
In his speech, Wang Kerui pointed out that FD-SOI possesses three core technical advantages: first, high performance and ultra-low power consumption, capable of operating at the minimum energy point (<0.4V) and achieving a 7x improvement in energy efficiency under ultra-low voltage (ULV); second, excellent millimeter-wave RF-CMOS performance, with CMOS millimeter-wave performance comparable to SiGe RF devices; third, outstanding reliability, with a soft error rate (SER) improved by 20 times compared to bulk silicon processes.
It should also be noted that 28nm/22nm FD-SOI can match or even surpass the expensive 12nm/7nm FinFET (Fin Field-Effect Transistor) in terms of power consumption and performance, but at a lower cost. This also makes it possible to achieve better performance without the need for expensive advanced lithography equipment.
In terms of application scenarios, FD-SOI covers three key directions: the ultra-low power domain, customized for wearable devices and IoT edge devices, where its unique body biasing (FBB/RBB) technology enables dynamic power management; the RF and connectivity domain, featuring highly integrated 5G/6G millimeter-wave and Wi-Fi transceivers with excellent high-frequency performance and low noise characteristics; and the automotive and industrial MCU domain, where high reliability, extreme temperature tolerance, and excellent SER immunity make it an ideal choice for ADAS and mission-critical control.
Wang Kerui also showcased several benchmark cases in the FD-SOI ecosystem. For example, in the automotive and industrial fields:
ST: 18/28nm FD-SOI MCU (PCM xMemory), demonstrating ultra-high reliability;
Starlink & ST: 18nm FD-SOI MCU STM32V8, integrated into the Starlink user terminal system, adapting to harsh working environments;
Arbe & Jingwei Hirain: 22nm FD-SOI millimeter-wave radar, which has secured ADAS L3 design orders and is expected to enter mass production in 2027;
Mobileye: 28nm FD-SOI ADAS SoC EyeQ4, a mass-produced ADAS vision processor that combines computing performance with low power consumption.
Wang Kerui pointed out that from L3 autonomous driving to satellite terminals, Tier-1 suppliers and chip manufacturers have increasingly demonstrated that FD-SOI has unique advantages in high-temperature reliability and high-frequency performance.
In addition, in the field of edge AI and low-power processors, FD-SOI also performs outstandingly:
Rockchip: 22nm FD-SOI high-performance NPU, empowering edge AI vision and audio chips, providing low dynamic power consumption and high energy efficiency;
GreenWaves: 22nm FD-SOI edge AI and audio processor, specifically designed for TWS earbuds and edge AI, achieving exponential computing power at 50mW power consumption;
NXP: 28nm FD-SOI edge processor, targeting industrial IoT and smart home devices, with an ultra-low deep sleep current of only 15μW.
Wang Kerui emphasized that battery life is the ultimate bottleneck for consumer electronics, and 28/22nm FD-SOI can match or even surpass the expensive 12/7nm FinFET in energy efficiency without incurring high costs.
In the field of RF and connectivity, the application of FD-SOI is equally extensive:
Qualcomm & Apple: 22nm FD-SOI millimeter-wave antenna module, providing excellent RF isolation and lower signal attenuation;
Google Pixel 6: 28nm FD-SOI millimeter-wave RF module, pioneering the commercial 5G millimeter-wave RF front-end;
Sony: 28nm FD-SOI GNSS receiver, the standard GNSS receiver for smartwatches, where body biasing technology reduces active power consumption to the milliwatt level;
Qualcomm: 22nm FD-SOI QET7100, Optimize 5G PA efficiency using 22FDX to reduce heat dissipation and extend battery life.
Wang Kerui pointed out that RF integration and power scaling are key for next-generation mobile and wearable devices. FD-SOI provides a proven single-chip platform capable of achieving low power consumption, high isolation, and excellent RF efficiency.
Regarding the ecological panorama, Wang Kerui presented the complete landscape of the FD-SOI ecosystem: on the substrate side, there are Soitec, NSIG, and SimWings; foundries include ST, Samsung, GlobalFoundries, and HLMC; fabless design companies cover Rockchip, NXP, Mobileye, Qualcomm, Nordic, etc.; IP and design services are provided by VeriSilicon; EDA tools include Empyrean and Primarius; and end customers include BYD, Samsung, Google, Apple, etc. Wang Kerui stated that as a leading SOI substrate supplier, NSIG is entering the FD-SOI ecosystem to empower the entire industry chain.
The Leap from 200mm to 300mm
In his speech, Wang Kerui reviewed SimWings' development journey of establishing SOI manufacturing capabilities in China "from 0 to 1": in 2001, Simgui was founded, becoming the first SOI wafer manufacturer in mainland China; in 2014-2015, mass production of 200mm RF and power SOI wafers was achieved, beginning to serve the global market; in 2022, SimWings was established, producing China's first 300mm SOI wafer; and in 2026, mass production of 300mm SOI wafers was realized.
In terms of the 300mm SOI product portfolio, SimWings currently has a complete product layout, including:
RF-SOI for RF applications, supporting high linearity and low insertion loss characteristics;
HV-SOI for power applications, supporting high reliability and high-performance computing;
FD-SOI for logic applications, supporting ultra-low power consumption;
Photonic-SOI for waveguide applications, supporting the top silicon layer as a waveguide;
MEMS-SOI for MEMS applications, supporting controllable top silicon structures.
Layout in the Silicon Photonics Ecosystem
Regarding the emerging silicon photonics ecosystem, Wang Kerui pointed out that silicon photonics is experiencing explosive growth. According to the latest forecast by Dell'Oro (August 2026), global data center capital expenditure is expected to exceed USD 3 trillion by 2030. Silicon photonics has two core advantages: first, integration, enabling the integration of optoelectronic chips; second, standardized manufacturing, utilizing traditional silicon manufacturing platforms (200mm/300mm wafer fabrication). Its application fields cover data centers, supercomputing, autonomous driving, radar, and optical computing.
Wang Kerui presented the silicon photonics ecosystem, in which SimWings is deeply integrated. From PIC design, SOI substrates, epitaxial wafer suppliers, foundries, packaging, transceiver integrators, equipment manufacturers to operators, a complete industry chain layout has been formed.
Wang Kerui stated that SimWings provides a full spectrum of substrate solutions ranging from ultra-low power logic to high-performance photonics and power electronics. In terms of product parameters, SimWings' 300mm SOI wafers cover a top silicon thickness range from 10/12nm to over 15μm, meeting the needs of various applications.
300mm FD-SOI to Enter Mass Production in 2027, with 300mm SOI Annual Capacity Reaching 1 Million Wafers by 2030
Currently, SimWings has achieved mass production of three major categories of 300mm SOI: HVSOI, RF SOI, and Photonics SOI. The thickness uniformity and defect control have reached industry-leading advanced levels, possessing the substrate supply capability to support the development of FD-SOI and related industries.
According to SimWings' 300mm SOI roadmap, HVSOI, RF SOI, and Si-Ph SOI products were mass-produced in 2026, mainly covering the power, RF, and silicon photonics fields. Meanwhile, FD-SOI dedicated substrates (which have extremely high requirements for substrate quality and long certification cycles) are in the pilot run stage in 2026 and are expected to achieve mass production in 2027, providing a clear expected timeline for upstream and downstream enterprises in the FD-SOI industry chain.
In terms of capacity planning, SimWings' 200mm SOI capacity is approximately 600,000 wafers/year, while the 300mm SOI capacity will reach 400,000 wafers/year by the end of this year, and is expected to reach a capacity of 1 million wafers/year by 2030.
Regarding supply chain security, Wang Kerui emphasized that for SimWings' 300mm SOI, from raw materials to SOI wafers, the supply chain is fully guaranteed and controlled by NSIG. The crystal growth process is carried out at Zing, and the final SOI process is completed at SimWings, including key steps such as bonding and layer transfer.
NSIG Comprehensive Silicon Material Platform: Comprehensive Layout from 200mm to 300mm
Finally, Wang Kerui introduced the comprehensive silicon material platform of its parent company, NSIG. In terms of 300mm wafers, NSIG's 300mm wafers cover all logic and memory process requirements of mainland China customers, have been fully qualified, and are shipped in bulk to core customers. Multiple international customers have also passed certification and received bulk shipments.
Currently, NSIG has built one of the largest and most advanced 300mm wafer production lines in mainland China, meeting the evolving needs of logic, memory, image sensors, and special processes.
NSIG's 300mm wafers now cover: logic chips (AI computing, smartphones, PCs, power management); memory chips (HBM, DRAM, 3D NAND, NOR); image sensors (stacked CIS, BSI CIS, FSI CIS, dTOF); and special processes (IGBT, RF/IPD, DDIC, annealed wafers, power devices). In terms of market outlook, the surge in demand for AI data centers, model training and inference, high-end smart devices and edge-side models, intelligent driving and robotics, and 5G-A/6G networks and communications are all major driving forces.
In the fields of 200mm SOI, specialty wafers, and epitaxial wafers, NSIG mainly targets mature nodes of 90nm and above, as well as special processes, including silicon photonics, power management, analog ICs, MEMS, power devices (MOSFETs, IGBTs), and GaN-on-Si. Wang Kerui pointed out that the market is in an upward cycle, and AI, automotive electronics, new energy, and industrial control will support demand in the next 1-2 years, with an overall positive outlook.
Specific products include: SOI wafers (silicon photonics, power management, RF, MEMS); specialty wafers (GaN-on-Si, IGBT/FRD, MEMS, precision sensing); epitaxial wafers (IGBT/FRD, SJ-MOS, HVMOS, SGT/LVMOS, TMBS); and epitaxial services (PMIC, analog, high-voltage drive, SJ-ML). These cover AI servers and edge computing, silicon photonics chips and optical modules, IoT and smart sensing, 5G/6G networks and communications, NEVs, wind and solar energy and energy storage, industrial control, consumer electronics, power management, signal chains, edge drives, and analog-digital interfaces.
Regarding the mass production progress of 300mm SOI, Wang Kerui revealed four key pieces of information: first, the products are qualified, with BCD, RF, and silicon photonics products having passed certification; second, clean and protected IP, with continuous cooperation with Soitec to expand the license from 200mm to 300mm; third, a secure SOI supply chain, especially for the Chinese market, where NSIG fully guarantees wafer supply internally to ensure 300mm SOI supply, and the products have been certified by customers; fourth, reliable 300mm SOI capacity, reaching 33K wafers/month by 2026, and capacity expansion of over 1 million wafers per year is already in planning.
Editor: XinzhiXun - Langkejian