[Relevant Companies Mentioned in This Article] TSMC (Taiwan Semiconductor Manufacturing Company), GlobalFoundries, LioniX, Silterra, iPronics, nEye, Salience
Silicon Photonics in Data Centers
Optical modules have been used in data centers for many years. From early storage-centric data centers to today's compute-centric scale-out compute cluster interconnections, the proportion of optical interconnects is becoming increasingly significant. As shown in the Google Jupiter network in the figure above, yellow single-mode fibers (SMF) interconnect thousands of compute racks. Each rack is equipped with a Top-of-Rack (TOR) Ethernet switch with 128 ports at the top, interconnecting every TPU core. Therefore, when large-scale compute clusters scale up vertically, the demand for optical modules, Co-Packaged Optics (CPO), single-mode fibers, and connectors will be massive.
According to Omdia, speaking at the Optical Fiber Communication Conference and Exhibition (OFC 2025), over the past 12 years, the optical device market grew from billions of dollars in 2003 (primarily applied in the telecommunications sector) to approximately $13 billion in 2023, and is projected to reach a staggering $25 billion by 2030. A prominent phenomenon in the industry is that copper cables are being replaced by optical fibers, and the transition period will be further shortened. These single-mode fibers, made of extremely fine glass, can transmit single-mode or multi-wavelength optical signals, effectively revolutionizing electrical signal interconnects. Corning, the industry leader in optical fibers, sells approximately $7 billion worth of optical fiber products annually. Recently, Meta signed an agreement with Corning totaling up to $6 billion, securing half of Corning's optical fiber production capacity for the next few years.
Naturally, optical interconnects are inseparable from silicon photonic devices. Optical modules and CPO are the core components of current interconnects. Pluggable optical modules are standardized hot-pluggable devices. One end connects to the electrical interface of a switch or compute rack, while the other end connects to the optical fiber network, offering lower power consumption and wider bandwidth compared to copper cables. The components of pluggable optical modules mainly include: lasers, CMOS chips with DSP functions and high-speed SerDes, silicon photonic modulators (typically Mach-Zehnder modulators), and discrete components such as filters and couplers. Currently, the market mainstream is gradually evolving from 800G to 1.6T.
Co-Packaged Optics (CPO) is another solution with higher bandwidth and lower power consumption. If optical modules are about to terminate copper cable interconnects, then CPO will replace optical modules. Taking Nvidia's Quantum-X silicon photonic CPO as an example, the 115.2 Tb/s Quantum-X optical switch contains a total of 2 CPO modules. One packaging module consists of a Quantum-X800 ASIC and 6 optical components; the full assembly delivers a total of 18 silicon photonic engines. The Quantum-X800 ASIC delivers a throughput of 28.8 Tb/s and integrates 107 billion transistors based on the TSMC 4N process. A single direct-connect optical component of the CPO module contains 3 silicon photonic engines built upon an interposer middle layer. Across the full switch assembly, there are 18 optical engines and 3 small pluggable connectors per optical component, capable of achieving a throughput of 4.8 Tb/s. Each silicon photonic engine utilizes a 200 Gb/s microring modulator, which can save 3.5 times power consumption. The optoelectronic chips in the silicon photonic engines are integrated on the substrate via 3D stacking, outputting optical signals externally through fiber arrays. Furthermore, the silicon photonic engines adopt the TSMC N6 process, packing 220 million transistors and monolithically integrating 1,000 photonic devices.
Looking at the industry, the current major silicon photonic chip foundries are TSMC, GlobalFoundries (which recently acquired AMF), and Tower Semiconductor. In addition, there are some smaller players, such as imec, which provides prototyping services, LioniX in the Netherlands, and Silterra in Malaysia. In China, SMIC (Semiconductor Manufacturing International Corporation) can provide silicon photonics foundry services, while Huatian Technology, JCET (Jiangyin Changdian), and USI (Universal Scientific Industrial) can provide CPO packaging services. Besides the well-known COUPE platform of TSMC, after GlobalFoundries (GF) acquired AMF, GF claimed to have become the world's number one silicon photonics (SiPho) foundry. It owns two wafer fabs in Singapore, with capacity concentratedly released over the next three years, and is also favored by the industry as a strong competitor to rival TSMC in the future. These two fabs mainly focus on coherent optical devices in the C-band and L-band. According to Kevin Soukup, Vice President and General Manager of Silicon Photonics at GF, GF possesses a process that can manufacture 45nm CMOS as well as RF and/or silicon photonic devices on a chip, leveraging advanced hardware originally deployed for its 12nm FinFET process to fabricate low-loss waveguides. It also has technology similar to TSMC's COUPE process for integrating the Electrical Interface Chip (EIC) and the Photonic Integrated Circuit (PIC) into a single chip. However, unlike TSMC, it uses optical mirrors at the top of the chip to reflect the signal input from the fiber by 90 degrees to connect to the edge of the chip, thus eliminating the need for grating couplers. Furthermore, GF has already demonstrated this CPO integration technology to its customers to enable customer-customized scale-out and scale-up Co-Packaged Optics (CPO) chips.
Niche Tracks Hold Massive Opportunities
CMOS chip design requires mastering the foundry's PDK and complex device libraries, and then integrating them to ultimately form a large and complex IP core containing numerous subsystems. Today's silicon photonics R&D is even more challenging. Foundries and R&D centers are exploring uncharted territory, and R&D engineers need to build their own device libraries, starting from SPICE to model and simulate step by step. Therefore, companies like Synopsys and Cadence not only have a strong technological moat in electronic chip PDKs but also provide the industry with design tools for silicon photonic chips. Thus, EDA tools and PDKs for silicon photonic device design remain a blue ocean at present.
Optical Circuit Switches (OCS) are the "magic weapon" for AI servers that Google has advocated for years. Its TPU clusters do not require traditional switches. By directly connecting to the OCS through top pluggable optical modules, a three-dimensional routing structure is constructed to realize a cluster composed of thousands of TPUs. Currently, this top-style interconnection scheme has been proven highly effective for redundancy, reliability, and network reconfiguration to handle constantly changing workloads. The core of this scheme is the MEMS (Micro-Electro-Mechanical Systems) mirrors, which can receive arrays of hundreds of input fibers and direct the optical path to any one of hundreds of output fibers.
Industry giants Lumentum and Coherent currently also provide OCS technology, but there are differences between the two. Lumentum adopts traditional MEMS mirrors, while Coherent uses a liquid crystal solution. At a financial conference in December last year, Coherent’s CEO stated: "We are very optimistic about OCS and predict that the total addressable market (TAM) for OCS will reach $2 billion to $3 billion." Coincidentally, multiple startups have also joined the development of OCS. iPronics, nEye, and Salience have revealed to the industry that their proof-of-concept sample testing has been delivered to users for evaluation. They have also optimized the current OCS solutions to a certain extent, which may ultimately be more economical and reliable than existing architectures, with a significant increase in density. This enables OCS to be applied to scale-out connections, ultimately achieving full GPU-to-GPU OCS connections.
Meanwhile, Jeff, CEO of Flex Logix, is also optimistic that future silicon photonics foundry services will become more concentrated in leading companies like TSMC. Typically, silicon photonic devices originate from silicon-based devices and are manufactured on 8-inch or 12-inch production lines. The current industry process node is 65nm, using SOI wafers with a 1um thick SiO₂ layer to isolate optical signals. Because single-mode optical signals mainly propagate within the silicon (or silicon nitride) waveguide core, a relatively thick isolation layer is required to prevent part of the optical field from "leaking" into adjacent materials above, on the sides, and below.
To address the huge challenge of signal loss, larger laser light sources are needed at the waveguide input. As signal bandwidth and quantity increase, overall power consumption will become a massive issue, making it critical to control the signal loss of materials.
Furthermore, silicon photonic wafer foundries must overcome numerous process issues. For example, waveguide routing has a minimum bending radius and cannot make 90-degree turns like electrical signals to avoid signal reflection. The precision of optoelectronic couplers and detectors must be extremely high, and germanium materials need to be fused into silicon and silicon oxide materials. The introduction of new materials undoubtedly increases the difficulty of process development. At the same time, the manufacturing of microrings for modulators is also a major challenge. SiPho and CMOS mainly adopt 45–65nm process nodes, but the tolerance requirements are much stricter than those for silicon electronic devices.
It is projected that by 2030, silicon photonics technology will be ubiquitous in data centers. Utilizing silicon photonics technology, chips capable of complex manipulation of light can now be manufactured. As process nodes continue to advance, we will soon become accustomed to seeing circuit boards with bright yellow optical fibers filling entire compute clusters.
The illustrations in this article were generated by NotebookLM.
Reference: "Silicon Photonics in the Data Center: What a CMOS Exec Needs to Know"