Recently, the Ministry of Industry and Information Technology and the National Development and Reform Commission jointly issued the "15th Five-Year Plan for the Development of the Electronic Information Manufacturing Industry" (hereinafter referred to as the "Plan"), which specifically proposes "promoting the R&D and industrialization of the fifth-generation Reduced Instruction Set Computer (RISC-V), and supporting the application of RISC-V chips in fields such as AI (Artificial Intelligence) and embedded systems," which is highly encouraging to us.
Seven years ago, when ESWIN Computing chose RISC-V as its core technology route, the industry was still debating whether this architecture was "usable"; seven years later, the industry has demonstrated its industrial value through practical actions. We deeply realize that RISC-V is no longer just an "alternative option," but a "strategic choice" shouldering the heavy responsibility of building the computing power foundation in the AI era. Combining the spirit of the "Plan" and the seven-year industrial practice of ESWIN Computing, we have the following thoughts and actions.
Building a Solid Foundation and Strengthening the Chain: Solving Underlying Technical Challenges with the Open-Source RISC-V Architecture
The "Plan" places "consolidating industrial foundation capabilities" at the top of key tasks, explicitly requiring "promoting whole-chain research in the IC (Integrated Circuit) industry" and developing high-end chip products such as high-performance processors. China's IC industry faces two major challenges: one is the precision issue at the manufacturing end, and the other is the underlying technology issue at the product end.
In the global chip market long dominated by x86 and Arm architectures, RISC-V, with its open-source, flexible, modular, and highly energy-efficient characteristics, is considered a native computing architecture for the AI era and is becoming the third pole of computing architectures in the AI era.
According to Frost & Sullivan, the market size of China's RISC-V microcontroller chips grew from CNY 1.1 billion in 2021 to CNY 37.7 billion in 2025, with a compound annual growth rate as high as 139.5%. It is expected to reach CNY 219.4 billion by 2030, indicating huge room for growth.
As for ourselves, by the end of March 2026, ESWIN Computing has commercialized over 150 software-hardware collaborative products for human-computer interaction, multimedia processing, interconnection, and computing, serving 220 customers globally. Our technology reserves include more than 620 IP modules, over 20 serialized RISC-V cores, and more than 1,740 patent applications. Based on a rich IP library and self-developed serialized RISC-V cores, ESWIN Computing has built deep software-hardware collaboration capabilities, consolidating the underlying foundation for AI computing power deployment in multiple fields, and implementing RISC-V products and solutions across various sectors.
Chip-Model Synergy: Consolidating the AI Hardware Foundation through the Deep Integration of "RISC-V+AI"
In the section of "cultivating new growth drivers for industrial development," the "Plan" explicitly proposes "consolidating the AI hardware foundation," requiring strengthened synergy between AI chips and complete machine products, developing on-device inference equipment and chips for fields such as Embodied AI and autonomous driving, and deepening chip-model synergistic innovation.
Since its inception, we have firmly pursued the "RISC-V+AI" technology route. This long-term layout highly aligns with the chip-model synergistic innovation direction proposed in the "Plan." Based on the evolution trend of the "device-edge-cloud" intelligent industry, we adhere to the deep integration and collaborative optimization of computing power and algorithms, bridging the adaptation link between chip computing power and intelligent models, enabling hardware platforms and intelligent algorithms to form a complete systematic support. Relying on this approach, we completed the adaptation and verification of domestic large models such as DeepSeek on our self-developed RISC-V platform at an early stage, creating a unified computing power foundation for diverse device-edge-cloud scenarios. This consolidates hardware support for the implementation of applications such as intelligent connectivity, intelligent cockpit, and intelligent computing, continuously verifying the industrial potential of "RISC-V+AI" in ongoing product practices.
In specific practice, the automotive-grade electronic rearview mirror dedicated chip EAI8800 we built based on the RISC-V architecture integrates the functions that traditional solutions require three chips to achieve into a single chip, with end-to-end latency controlled within 20 milliseconds. This precisely reflects the unique value of RISC-V in customized and highly energy-efficient scenarios.
Ecosystem Co-construction: Promoting RISC-V from "Alternative" to "Mainstream" through Open Collaboration
In the section of "enhancing the sustainable development capability of the industry," the "Plan" emphasizes "comprehensively improving independent innovation capabilities" and "building a new pattern of opening-up and cooperation." The inherent open attributes of RISC-V determine that it cannot follow the path of closed development. Currently, this architecture is joining the ranks of mainstream computing architectures, bringing a historical opportunity for architectural innovation to China's semiconductor industry.
To seize this era's opportunity, relying solely on individual enterprises is insufficient; there is an urgent need for open collaboration across the industrial chain to co-build a complete industrial ecosystem. To this end, ESWIN Computing took the lead in proposing the industrial concept of RISC-V Digital Infrastructure (RDI), advocating the application of RISC-V at all levels of digital infrastructure, and spearheading the establishment of the RDI Synergy Alliance. The alliance now has nearly a hundred members, covering the upstream and downstream of the industrial chain. It has also promoted the establishment of RDI innovation centers in Beijing, Wuhan, Chengdu, Xi'an, and other places to form multi-regional linkage. Meanwhile, the company has built the RISAA (RISC-V+AI) ecosystem technology platform, deeply integrating the RISC-V computing architecture with AI technology, collaborating with industrial chain partners to promote the implementation of RISC-V in various vertical scenarios, continuously expanding the boundaries of RISC-V application scenarios, and steadily improving the industrial software-hardware ecosystem and standard system. At the same time, we are deeply involved in the formulation of global RISC-V standards to enhance our country's industrial discourse power in the field of open-source computing architectures.
As the "Plan" is implemented, the RISC-V industry will usher in an acceleration period from policy support to market-driven growth. We believe that when AI moves from training to inference, intelligent agents move from digital to physical, and RISC-V moves from alternative to mainstream, these three transformations will resonate at the same frequency, converging into tremendous momentum to drive the leap of the AI industry. ESWIN Computing will continue to take "RISC-V+AI" as the strategic anchor, join hands with upstream and downstream partners in the industrial chain, and use RISC-V as the foundation to jointly consolidate the computing power foundation in the AI era, contributing to the high-quality development of China's electronic information manufacturing industry.
Author | Mi Peng, Chairman and CEO of Beijing ESWIN Computing Technology Co., Ltd.
Editor | Zhang Xinyi
Art Editor | Ma Liya Supervisor | Lian Xiaodong