Author: Fang Yuan
In the first half of this year, IDC reported that global shipments of quadruped robots exceeded 49,000 units, a substantial year-on-year increase of 92.5%. Interestingly, Counterpoint reported shipment data of only about 35,000 units for the same period, a discrepancy of over 10,000 units; even the second-ranked vendor could not be aligned between the two rankings.
The conflicting data itself is a signal. This market is shifting from storytelling to territory grabbing, and the approaches vary completely among different players. Yushu relies on low prices for high volume, while Yunshenchu earns profits through industrial-grade products. Behind these two strategies lie two completely different chip demand curves. But what truly deserves our attention is not the nearly 50,000 robot dogs themselves, but a more fundamental question: when a robot dog moves from the exhibition hall to the substation, and shifts from performing dances to inspecting equipment, what exactly has changed in the chips inside its body?
01 Dancing and Working: What Exactly Is the Difference Behind This?
The chip solution for consumer-grade quadruped robots is relatively simple. The core computing platform of a Yushu Go2 is the Rockchip Electronics RK3588S, supplemented by a few MCUs (Microcontroller Units) to control the joint motors, and the solution is set up. The RK3588 from Rockchip Electronics has already achieved a high market share in the robot market, cooperating with manufacturers such as Yushu, Yunshenchu, Jizhijia, and Kewosi to cover various forms including humanoid, quadruped, and industrial inspection. The company has listed robots as an important product line in its AIoT strategy, with the RK3588 mainly taking on the role of the "cerebellum," responsible for motion control and environmental perception.
However, the chip requirements for a quadruped robot working in power inspection scenarios are completely different. It needs to process data from visible light cameras, infrared thermal imagers, and acoustic fingerprint sensors simultaneously, maintain centimeter-level positioning in complex terrains, and make decisions after real-time fusion of multi-source signals. From the perspective of the industry, a humanoid robot generally uses 20 to 30 sets of encoders, requiring high rotation speeds of over 10,000 RPM, as well as ensuring no position jumps or false alarms under heavy impacts. Although the number of encoders in quadruped robots is less than that in humanoids, the reliability requirements in industrial scenarios are aligning with automotive-grade standards.
The essence of this change is that chip demand is shifting from centralized to distributed. A full-size humanoid robot (including dexterous hands) deploys nearly 100 MCUs. Unlike MCUs in the industrial and automotive fields, the space for each joint in a robot is extremely limited. "Space-saving" is the top priority requirement for many customers. MCUs need to integrate more functions within smaller packages while strictly controlling heat generation and power consumption. Each additional degree of freedom adds a set of MCU requirements, and the degrees of freedom in robots are continuously increasing.
GigaDevice Semiconductor released the GD32H77R and GD32F50MxxG, two robot-specific MCUs, in August 2026. The former integrates an industrial Ethernet controller and physical layer transceiver on-chip, enabling multi-joint synchronization without external chips; the latter adopts a co-packaging process to integrate a self-developed gate driver and Op-Amp (Operational Amplifier) into a single package. These two products address the same pain point: the joint module space in robots is too small for traditional solutions to fit in. For the first time, semiconductor manufacturers are seriously customizing chips specifically for the "robot" end-product category, rather than selecting from existing industrial MCU product lines.
Industry insiders shared a judgment during exchanges with the author: as the power density of joint modules continues to increase, thermal dissipation and driving capabilities often constrain each other, making it difficult to attribute the issue solely to a single link. In comparison, thermal dissipation solutions hit the ceiling earlier in engineering—joint module space is limited, sealing requirements are high, and heat dissipation paths are limited. Relying solely on improving the performance of chips and power devices cannot solve the overall problem. Meanwhile, switching losses and thermal coupling under high power density will amplify each other, so practical solutions usually involve collaborative optimization of thermal dissipation and driving. Regarding the introduction path for GaN and SiC, the industry tends to believe that it will first start from scenarios with relatively fixed working conditions, such as industrial robotic arms or quadruped robots. Humanoid robots are more sensitive to volume, weight, and cost, so the short-term introduction pace will be slower. The current main constraints remain cost and reliability verification, especially the complete cycle of the automotive-grade verification system, which the robot industry has not yet fully navigated. This judgment also explains why the competition for main control chips will ultimately fall on system-level solutions.
From the perspective of architectural routes, the main control chips for embodied AI currently form a tripartite pattern. NVIDIA's Jetson AGX Thor, built on a 4nm process, provides up to 2070 FP4 TFLOPS of computing power, locking in the high-end market with its CUDA ecosystem and Isaac framework. Qualcomm's Dragonwing IQ10 offers 700 TOPS of computing power and an 18-core Oryon CPU, positioning itself for industrial robots and autonomous mobile robots. In the domestic camp, D-Robotics, under Dipinxian, launched the Xuri S600, equipped with an 18-core A78AE CPU and a 6-core R52+ MCU, achieving 560 TOPS of edge computing power, and has completed deep adaptation for mainstream models such as Qwen3 and YOLO26x.
Xinchikeji proposed a three-layer control architecture scheme of "brain-cerebellum-trunk/joint," and the cross-boundary entry of automotive chip companies is particularly worth noting. The M100 from Lixiangqiche and the Turing chip from Weilaiqiche represent the trend of automakers developing their own physical AI chips. The chip development for automobiles and robots is moving towards integration, due to common constraints: running edge AI inference under strict limitations of power consumption, thermal dissipation, and cost.
02 The Window Period for Domestic Chips Is Shorter Than Expected
The overall localization rate of core components for quadruped robots has exceeded 75%, but this figure conceals a structural gap: localization in high-end computing chips has just begun. The reason Yunshenchu's Jueying X series can be sold at high prices lies in its achievement of centimeter-level positioning and millisecond-level decision response in power inspection scenarios. The high-precision sensors and AI computing chips relied upon behind this still have a significant proportion coming from overseas solutions.
However, the gap is being rapidly filled. Youbixuan and MetaX jointly established XILECT in June 2026, with a registered capital of CNY 100 million. MetaX and Youbixuan each hold 35.01% of the shares, tying as the largest shareholders, focusing on the R&D and mass production of edge-side chips for embodied AI, planning to tape out in the second half of 2027 and mass-produce in 2028. Zhijidongli and Dongdukeji took another path: replacing the operating system, communication bus, tool software, and AI chips entirely with domestic solutions, and jointly launching the Localization Embodied AI Robot Electronic Architecture Alliance with industrial partners such as Tsinghua University, AgiBot, and Moerxiancheng. The localization of electronic architecture is more difficult than replacing a single chip, involving the collaborative rewriting of the operating system, communication protocols, and whole-machine control software. The verification cycle is longer, and the requirements for the adaptation capabilities of whole-machine manufacturers are also higher.
The joint verification by the Beijing Humanoid Robot Innovation Center and SpacemiT is also worth noting. Based on SpacemiT's full-stack self-developed RISC-V AI SoC (System on Chip), Jushen Tiangong has achieved stable walking and running. The open-source nature of RISC-V allows enterprises to conduct deep independent design and optimization, providing a technical path for the embodied AI industry to achieve independent and controllable core processors. However, RISC-V is still catching up with the ARM ecosystem in terms of real-time control and toolchain maturity. Current verifications mostly stay at the motion control level, and there is still a distance to go before undertaking complete embodied AI computing tasks.
The real bottleneck restricting domestic chips from being adopted may not lie in the chips themselves, but in the toolchains and ecosystems. The complete cycle for a brand-new dedicated AI chip, from architecture design, IP development, tape-out verification, to toolchain adaptation, is as long as 2 to 3 years. Meanwhile, the large-scale implementation of the embodied AI industry has only started for two or three years, and the shipment volume of whole machines has not yet formed a sufficient scale. The risk for a single enterprise to independently invest in dedicated chip R&D is extremely high.
Huixizhineng released a full-stack computing power platform for embodied AI in August 2026, simultaneously launching a complete software system covering model frameworks, compilers, operator libraries, middleware, OS, simulation, and real-time control. The full-stack control solution for six-axis collaborative robotic arms jointly released by D-Robotics and GigaDevice Semiconductor completed the interoperability between GigaDevice Semiconductor's EmbeddedBuilder visual development platform and D-Robotics' edge-cloud integrated AI Native toolchain, building a one-stop development environment from algorithm training and model deployment to underlying servo debugging. The common direction of these actions is: chip manufacturers have realized that selling chips in the robot field is essentially selling an overall solution of "chips + toolchains + reference designs."
Industry insiders engaged in embodied AI expressed similar views during exchanges: regarding the deployment of motion control algorithms on domestic main control chips, the currently discussed gaps are mainly concentrated at the toolchain and operator library levels. Compilers and real-time debugging tools also have gaps, but these are more engineering experience issues; toolchains and operator libraries directly determine whether algorithms can run efficiently, making them a direction more worthy of priority investment. If ranked by industrial urgency, functional safety certification and toolchain maturity should be prioritized over real-time performance and reliability. Industrial-grade robots will have continuously increasing requirements for functional safety, but domestic chip solutions that have passed robot functional safety certification are still limited, and toolchain maturity also directly affects the adaptation costs of whole-machine manufacturers. Real-time performance and reliability depend more on the design capabilities of the chips themselves, and some domestic solutions already have good accumulation. This also means that the focus of competition for domestic chips is shifting from single-chip performance to the implementability of overall solutions.
The real meaning of this window period is: the right to choose the supply chain is still in the hands of whole-machine manufacturers, but the window is narrowing. When industry-level scenarios begin to be deployed in batches, chip solutions verified by mass production will quickly form a lock-in effect. And the maturity of the toolchain will become the decisive factor in whether chip solutions can be adopted by whole-machine manufacturers.
03 Chip Categories Are Diversifying, and the ODM Model Is Accelerating This Trend
Over the past two years, when the market discussed the pull of robots on semiconductors, it was accustomed to using the next smartphone as an analogy. But this analogy may not be accurate enough. The chip demand for smartphones is highly concentrated in two major chips: SoC (System on Chip) and memory. The annual shipment of 1 billion units can spread the cost of a single chip to the extreme. However, the chip demand for robots is highly dispersed: the basic configuration of a humanoid robot requires 50 to 60 MCUs, and the high-end version is close to 100. Adding sensor interface chips, PMICs (Power Management ICs), communication chips, and functional safety chips, there may be over a dozen categories of chips.
This dispersion means that the pull of robot volume growth on the semiconductor industry is not concentrated in a few categories, but unfolds simultaneously along multiple product lines. According to the calculations in the NSING Technologies white paper, calculating based on an average of 60 MCUs per humanoid robot, the mass production of 100,000 whole machines can bring about a demand of 6 million MCUs. Adding the increment from quadruped robots, the starting point is at the tens of millions level.
However, this dispersion also brings a supply chain-level problem: facing so many categories of chips, the selection and verification costs for whole-machine manufacturers are extremely high. The rise of the ODM model is accelerating the centralization of chip selection. After the whole-machine solutions are standardized, chip selection will also tend to concentrate. Whoever can lock in their position during the reference design phase of the ODM solution will get the ticket for subsequent batch orders. This "capital binding + joint development" model bypasses the simple supplier-customer relationship, binding the interests of chip manufacturers and whole-machine manufacturers more deeply. For chip companies, this means a longer product definition cycle and higher adaptation investment, but in exchange, once the solution is adopted, the replacement cost is extremely high.
Industry insiders familiar with robot whole-machine solution design told the author that the convergence of chip selection towards a few platforms is a directional trend, but the pace will not be too fast. The main driving factors are cost and toolchain maturity, and functional safety certification will also accelerate this process. Currently, whole-machine manufacturers run multiple solutions in parallel, largely because the requirements for computing power, power consumption, and interfaces vary greatly in different scenarios. After ODM solutions are standardized, chip selection will gradually concentrate on verified platforms, but this process may take two to three years. In terms of industrial, service, and consumer scenarios, industrial-grade currently has the clearest requirements for functional safety levels and domestic substitution rates. Service scenarios are still forming standards, while consumer-grade prioritizes cost and power consumption, and the domestic substitution rate is actually the highest. Regarding functional safety levels, industrial-grade has begun to make requirements, service-grade is still waiting and seeing, and consumer-grade basically does not involve it. This pattern means that chip manufacturers need to differentiate their competition strategies in different scenarios, rather than using the same set of solutions to cover all terminals.
From the perspective of functional safety, this trend is even more obvious. The G32R501D real-time control MCU from Jihai has passed the IEC 61508 functional safety certification by SGS and simultaneously obtained the AEC-Q100 reliability certification, making it the first domestic real-time MCU product to pass both certifications. The STL software test library supporting the GD32F5xx and GD32G5xx series MCUs from GigaDevice Semiconductor has obtained the IEC 61508 SC3 certification awarded by TÜV Rheinland in Germany. The significance of these certifications is that as robots move from closed scenarios to more open human-machine interaction environments, functional safety and reliability are becoming prerequisites for the industry to move towards high-quality development. The acquisition cycle for functional safety certification is long and costly. Once a chip solution takes the lead in obtaining the certification and completes the adaptation verification by whole-machine manufacturers, the cost for latecomers to replace it will be extremely high.
04 Chip Cost Proportion Is Not High, but It Determines Whether Robots Can Work
Chips account for only about 10% of the BOM cost of quadruped robots, perception modules such as sensors and LiDAR account for 20%, while joint modules are the largest cost item, accounting for about 40% to 50%. From a cost perspective, chips do not seem to be the main character.
But from a functional perspective, chips determine whether robots can complete those valuable tasks. IDC data shows that in the first half of 2026, the market size of industry-level applications exceeded USD 270 million, a year-on-year increase of 125.1%, and deployment volume increased by 260.5% year-on-year. This growth rate far exceeds the overall shipment growth rate. Industry-level applications, with less than 40% of the shipment volume, took away more than two-thirds of the revenue. For an industrial-grade robot dog priced at nearly CNY 300,000, if the chip computing power is insufficient and the sensor data fusion delay is too high, it may miss a heating anomaly point during substation inspection. The reason Yunshenchu's Jueying X series can be sold at high prices is precisely because it achieves centimeter-level positioning and millisecond-level decision response in power inspection scenarios.
The leap of chip solutions from "usable" to "user-friendly" is the real key to determining how much value the semiconductor industry can obtain from this wave of robots. And the speed of this leap depends on two variables: the speed at which domestic chips make up for the gaps in toolchains and functional safety certification, and the pace of batch deployment by whole-machine manufacturers in industry-level scenarios. The result of the race between these two variables will determine how large a position domestic chips can hold in the robot supply chain.