Intel's 18A process node is already in mass production, and 18A-P has entered risk production. The 14A process node will commence risk production in the second half of 2027, followed by high-volume manufacturing in 2028.
A 35-billion-parameter large model can run locally on a single PC; by 2030, over 80% of servers globally will still be running on x86 architecture; the 18A process node is in mass production, and 14A is advancing as scheduled. Taken together, these three sets of data represent Intel's redefinition of AI competition: as AI shifts from "generating content" to "executing tasks," the outcome no longer depends on a single chip, but on who can integrate PCs, edge devices, data centers, custom chips, and process packaging into a complete chain that brings intelligence to reality.
Today at Intel Connection 2026, Annie Shea Weckesser, Intel's Chief Marketing and Communications Officer, presented a set of implementation figures: over 70 software vendors are collaboratively optimizing AI PCs, domestic cloud service providers have launched more than 200 Intel Xeon 6 and Xeon 6+ instances, and over 100 robotics companies are bringing intelligence into real-world scenarios. Through this keynote, we can also clearly see what Intel's strategy is betting on.
CPU Re-emerges as the "Master Orchestrator" of the System
Many people's imagination of AI computing power is a GPU continuously performing matrix operations. However, real-world AI workloads are far more complex: planning, retrieval, reasoning, tool invocation, and action execution. The burst of model computation is just one part of it, while the rest relies entirely on general-purpose computing power for seamless integration. This is precisely the starting point of one of Intel's strategies—building an open platform spanning PCs, edge devices, and data centers to run intelligence in the "most appropriate place."
In the data center, the CPU is the orchestrator. As AI workloads expand, the demand for CPUs has not dropped but risen instead. The computing power ratio between CPUs and GPUs is shifting from 4:1 to 1:1. Accelerators handle bursty model computations, while the CPU connects applications, data scheduling, and acceleration units to drive tasks to completion. This judgment is not just Intel's own claim; Jensen Huang has also expressed the same view: "The CPU is no longer just supporting the model; it is driving the model." The master orchestration role of the CPU is becoming the very same position that tech giants are competing for. And Intel's confidence lies in x86.
Intel predicts that by 2030, over 80% of servers globally will adopt x86. Intel Xeon 6 offloads the "dirty work" such as host-side trusted execution for encryption, networking, and compression to built-in accelerators, freeing up GPUs and other accelerators for model computation. This approach has been validated at Alibaba Cloud: it offers more than 117 cloud instances based on Xeon 6, with over 50 instances already used in generative AI scenarios, supporting agents from experimentation to production.
On the PC front, the Intel Core Ultra 3 series integrates the CPU, GPU, and NPU (Neural Processing Unit), scheduling different tasks to the most suitable computing units. The hybrid AI agents deployed by Intel with partners such as Doubao and Marvis are built on the foundation of Intel Core Ultra, running 35-billion-parameter large models locally. The model itself determines when to process on the device and when to offload to the cloud.
At the edge, products from collaborative robot manufacturer Jacob are equipped with Intel Core Ultra, utilizing kernel-based virtual machines to integrate motion control, autonomous planning, and task execution into a unified edge architecture. For robots to perceive the environment in real time and precisely control movements, they rely precisely on the computing power density and instant response capabilities of Intel Core Ultra 3. All this indicates that the evaluation criteria for AI computing power are shifting from "how high the peak performance is" to "whether the system can complete the task."
Custom Chips to Fill the Gap for Differentiated Workloads
Another question addressed by Intel's second strategy is: with workloads so diversified, standard platforms will always have gaps they cannot cover, so what to do? Intel's answer is to co-develop custom chips, or ASICs (Application-Specific Integrated Circuits), with customers and hyperscale cloud providers. By investing in architecture, design, and IP across three dimensions, and combining advanced packaging and manufacturing capabilities, specific needs can be rapidly transformed into scalable solutions. Customization does not equal fragmentation. Only companies holding general-purpose platforms, comprehensive IP libraries, and manufacturing and packaging capabilities can meet custom demands, with each custom order accumulating reusable modules. Annie Shea Weckesser called out on-site: "If you are developing differentiated solutions that go beyond standard platforms, we welcome you to contact us." Shifting from selling standard chips to co-defining chips with customers, this pivot itself is a redefinition of AI competition.
Process and Packaging in Parallel: 18A in Mass Production, 14A on Track
Intel's third strategy is manufacturing. All stories ultimately come down to process and packaging, and Intel's advanced process roadmap is already very clear. Annie Shea Weckesser revealed that 18A is currently in mass production, and its derivative version, 18A-P, has entered risk production. 14A is progressing smoothly, with risk production starting in the second half of 2027 and high-volume manufacturing in 2028.
Running parallel to the process node is the second track: advanced packaging. The computing power required by AI systems is becoming increasingly heterogeneous. CPUs, GPUs, various accelerators, and different IPs come from diverse sources, which cannot fit into a single chip. Advanced packaging technologies such as EMIB and Foveros enable Intel to integrate multiple computing engines and IPs into a single package, relying on high-speed interconnects for data transmission and task scheduling. When the optimization of a single chip approaches its physical limits, packing more computing units into one package with shorter data paths itself becomes a new source of performance.
Connection is the Method, Implementation is the Result
Intel has told a complete story about "connection": connection gives intelligence its purpose, bringing together technology, talent, and ideas to transform possibilities into tangible progress. In the technical narrative, "connection" has at least three layers of meaning—connecting models with data, software, and devices; connecting general-purpose platforms, custom chips, and process packaging; and connecting the chip company with the people who use the chips. The set of data mentioned earlier is the best footnote to Intel's "connection" capabilities.
Since entering the Chinese market in 1985, Intel has spent over forty years in China. This time, Intel wants to tell a longer story: AI competition is not about the launch event of a single chip, but about the implementation capabilities across the entire chain—running 35 billion parameters locally, bringing agents from the lab into the production line, and enabling robots to complete tasks in real-world scenarios. This is what "Igniting the AI Era" truly looks like. *Disclaimer: This article was created by the original author. The content represents their personal views. We repost it solely for sharing and discussion, which does not imply our endorsement or agreement. If you have any objections, please contact the backend.