[Related Companies Mentioned in This Article] Avicena, Microsoft, Palomino, AU Optronics, Goertek, TSMC.
Technical Origins of Micro-LED Optical Interconnects
Micro-LED technology was not originally a product of optical interconnect solutions. In the early 2000s, Dr. Jin demonstrated micron-scale LED arrays in Applied Physics Letters for use in self-emissive pixel displays to enhance resolution and enable size miniaturization. Since then, the industry has focused on improving manufacturing processes and yields, with full-color conversion and defect control for millions of micron-scale LEDs primarily targeting the display sector. The commercial validation of this solution for optical interconnect applications has opened up a new technical pathway.
Tracing back the branching development of technical routes, the earliest efforts date back to around 2012, when researchers such as Kendry et al. used micro-LED arrays coupled with optical fibers to achieve signal transmission over a distance of 10 meters. The bandwidth reached up to 1.5 Gbps and could be expanded to four channels to achieve 6.25 Gbps. Over the subsequent decade, the industry continuously researched directions such as increasing bandwidth through multi-channel parallelism and further size miniaturization. A true turning point came in 2025 when Microsoft Research published the MOSAIC architecture at SIGCOMM. This architecture utilized a 20x20 array of single-channel 2 Gbps optical fibers, with each fiber corresponding to one micro-LED. The receiving side employed a CMOS sensor array. Their evaluation indicated that this prototype—comprising an FPGA + Micro-LED array + multi-core imaging fiber + CMOS array + TIA—could achieve power consumption levels equivalent to 68% of an 800G AOC (Active Optical Cable).
Also in 2025 at the OCP Global Summit, industry leader Avicena Tech showcased its Micro-LED-based Optical Interconnects technology. Its core concept focuses on optical interconnects ranging from 1 meter to 10 meters for AI Scale-Up applications. By constructing a system featuring Micro-LED emission + multi-core fiber arrays + CMOS photosensitive elements, it forms a wide-channel, low-rate, and high-density optical interconnect solution. At this year's OCP event, Avicena released a fully silicon-based parallel optical interconnect solution based on Micro-LED (µLED). The core idea remains consistent with previous iterations: utilizing wide parallel transmission interfaces instead of serial SerDes architectures to reconstruct short-distance interconnects at the system level, thereby replacing copper interconnects.
Technical Advantages and Industrial Bottlenecks
First, let us examine the advantages of Avicena's technical solution. In their presentation, they pointed out that in the Micro-LED interconnect scheme, there is no need for the massive SerDes IO modules found in switch chips. Instead, Micro-LED chips connect directly with XPUs. Utilizing its native 4 Gbps interconnect bus and native NRZ binary encoding transmission, the solution eliminates serial-to-parallel conversion, DSP retiming, and higher-order modulation schemes like PAM. It discards the complex overhead of serial architectures, transmitting signals directly to the receiving end's CMOS photosensitive chip.
Avicena also mentioned in the presentation that, based on this entirely new architecture, the Micro-LED solution leads comprehensively across key interconnect technical parameters:
1. Bandwidth Density: Supports two-dimensional area array layout, breaking through one-dimensional edge constraints. Linear density >10 Tbps/mm, area density >10 Tbps/mm². Continuous iteration and upgrades are possible by reducing LED pixel pitch.
1. Power Consumption: End-to-end link power consumption <1 pJ/bit, only 1/10th of traditional optical solutions. LEDs have no threshold current overhead, and power consumption scales linearly with data rate.
1. Latency: Eliminates all additional latency associated with serialization, modulation/demodulation, and DSP processing, driving signal processing overhead close to zero.
1. Reliability: No laser devices involved, fundamentally avoiding laser lifespan issues. Built-in redundant channels within the array support fault tolerance. Operating temperature can exceed 200°C, significantly higher than the upper limit for conventional chips.
1. Cost: Collaborating with TSMC to optimize CMOS photodetector processes supports wafer-level mass production. System cost < CNY 0.1 / Gbps, approaching the cost baseline of copper interconnects.
Currently, Avicena's LightBundle™ 1 Tbps evaluation kit has officially shipped and been delivered to customers and partners for testing. It is the world's first Micro-LED interconnect product. Manufactured using a 12nm process, the single chip integrates over 300 drivers and TIAs, featuring 335 Micro-LED channels. The single-channel rate reaches 3 Gbps, meaning it achieves 1 Tbps bandwidth on a 1 mm² Micro-LED array.
Avicena's "Wide-and-Slow" architecture represents a trade-off at another level. Overall, Avicena's solution differs from traditional optical interconnect solutions by two orders of magnitude in single-channel speed. Traditional solutions pursue serial rates of 50–100 Gbps per channel, at the cost of power consumption and latency introduced by DSPs, retimers, and complex modulation formats. In contrast, Micro-LED compresses the single-channel rate to 2–4 Gbps, employing hundreds or even thousands of parallel channels to boost total bandwidth. Connecting the transmitter micro-LED array and receiver PD array via multi-core fiber bundles allows chips to transmit data natively in parallel format, which is highly suitable for data movement between GPUs and memory in AI Scale-up scenarios.
OCP 2025 Avicena Keynote Q&A (Source: OCP)
However, many industry insiders point out that physical advantages do not equate to engineering feasibility. High-channel-count solutions require improvements in coupling processes, packaging alignment, and other technologies for fiber arrays. Specifically, the small emitting area of Micro-LEDs results in extremely narrow alignment tolerances for multi-core fibers or waveguides. Coupling efficiency is sensitive to sub-micron offsets. Especially during wafer-level or panel-level packaging, coupling loss in single channels and consistency across multi-core fiber arrays will directly determine the efficacy of the entire interconnect solution. Similarly, for AI computing clusters, post-deployment maintainability is critical. Micro-LED interconnect solutions still lag behind in reliability certification, supply chain maturity, and accumulation of field failure rate data.
Therefore, the realistic timeline should be viewed through the pace of resolving these bottlenecks rather than peak laboratory data. According to TrendForce's assessment, Micro-LED CPO optical transceiver modules are expected to see significant volume ramp-up starting in the second half of 2028, with a market output value of approximately USD 848 million by 2030. Although Avicena's 1 Tbps evaluation kit has already shipped, moving from evaluation kits to design-wins with hyperscale customers involves lengthy client-side verification and reliability testing. Thus, a reasonable expectation for 2027 is engineering samples and validation. Revenue ramp-up and industrial technology route migration should await further results.
Conclusion
Micro-LED optical interconnects are not intended to replace Silicon Photonics or VCSELs but to find a fitting market position in AI Scale-Up scenarios. Medium-distance, high-density, and underlying native multi-channel interconnect solutions offer the industry another option. Fundamentally, optical interconnects remain an engineering challenge, and solutions are never limited to a single path. With theoretical principles supporting it, followed by rigorous engineering validation, Micro-LED optical interconnects are poised to carve out their own niche.
References:
《MOSAIC: Breaking the Optics versus Copper Trade-off with a Wide-and-Slow Architecture and MicroLEDs》《OCP Global Summit 2025_Avicena Tech_Ultra Low Power MicroLED Based Interconnects for AI Scale-Up Networks》《OCP Global Summit 2026_Avicena：uLED-Interconnects-Addressing-the-Future-of-Scale-In-and-Scale-Up-Connectivity》