Abstract: As AI servers enter the 800V era, automotive SoCs increasingly resemble "mini servers," and 1500V photovoltaic systems begin to require high-voltage SiC, power semiconductor manufacturers are facing more than just how to make a single MOSFET more efficient. ROHM is integrating SiC, GaN, and Si MOSFETs with analog power products such as PMICs and DrMOS into a single technological landscape. This reflects a shift in power semiconductors from "component competition" to "system competition."
Su Yongjin, Senior Manager of the Technology Center, Shenzhen Branch, ROHM Semiconductor (Shanghai) Co., Ltd.
On August 26, during the 2026 PCIM Asia Shenzhen exhibition, ROHM held a media exchange meeting. Su Yongjin, Senior Manager of the Technology Center, Shenzhen Branch, ROHM Semiconductor (Shanghai) Co., Ltd., introduced ROHM's latest technological layout in AI servers, automotive electronics, and industrial equipment to eefocus reporters, focusing on the company's key markets and product strategies. A noticeable change in this exchange was that ROHM did not focus on a single new SiC or GaN product, but repeatedly emphasized the synergy between power devices and analog technology: from SiC, GaN, and Si MOSFETs to Gate Drivers, PMICs, and DrMOS, hoping to solve efficiency, power density, thermal design, and system complexity issues through device combinations.
From Components to Systems: Why is ROHM Increasingly Emphasizing "Power + Analog"?
In the power semiconductor industry, a manufacturer's technical capabilities were historically evaluated primarily by looking at the breakdown voltage, on-resistance, and switching losses of MOSFETs, as well as the product generations of SiC and GaN. However, as the power levels of AI servers, automotive central computing, and new energy systems continue to rise, the factors determining overall system efficiency are multiplying: power devices are just one part of the puzzle. Gate Drivers, control ICs, power topologies, packaging, thermal design, and the synergy between different voltage rails all impact final performance.
This is also the background behind ROHM's repeated emphasis on "Power + Analog" at PCIM Shenzhen. The approach is not to highlight SiC or GaN in isolation, but to consider power devices such as SiC, GaN, and Si MOSFETs alongside analog and control devices like Drivers, PMICs, and digital controllers within a unified power architecture. In AI server scenarios, this combination can already cover multiple stages, from 800V rectification and protection, to DC/DC and 48V/50V intermediate buses, and finally to multi-phase power delivery near the GPU/CPU.
Su Yongjin summarized ROHM's technological layout into two directions: "For these application markets, ROHM focuses on two major technological fields: power devices and analog devices." On the power side, ROHM continues to expand its SiC, GaN, and Si MOSFET offerings; on the analog side, it covers products such as power control ICs and Gate Drivers. According to him, ROHM aims to "achieve further energy savings and miniaturization of the overall system by providing comprehensive solutions that combine these products, while further optimizing noise and thermal countermeasures."
This shift is already reflected in ROHM's product forms. Taking GaN as an example, its EcoGaN™ roadmap has extended from a single HEMT further into the Power Stage, integrating 650V GaN HEMTs, Si Gate Drivers, and some protection and auxiliary functions into the same SiP. Compared to selling power transistors individually, this approach places greater emphasis on the matching between the device and the driver, and can also reduce the uncertainties caused by parasitic parameters and driver design in high-speed GaN applications.
The server product layout also shows a similar trend. ROHM has placed SiC, GaN, Wide-SOA MOSFETs, MPC+DrMOS, Hot Swap, and SSD PMICs into a single product roadmap. Among them, the fourth-generation SiC on the high-voltage side, new power modules, and some EcoGaN™ products have formed relatively mature product lines; while the MPC+DrMOS near the GPU and SSD PMICs are still in the stage of gradually improving public information. From an industry perspective, this "Power + Analog" is not simply expanding the product catalog. For ROHM, the next stage truly requires validating whether these discrete device capabilities can be further transformed into reusable and rapidly deployable system-level power solutions.
System-level landing points of ROHM's "Power + Analog" in three major applications. Source: Compiled by eefocus Research Institute
AI Servers Enter the 800V Era: How is ROHM Integrating SiC, GaN, and Si into the Same Power Chain?
In recent years, the power architecture of AI servers has been undergoing a deeper change than simply "switching to higher efficiency devices." As the power of GPU clusters continues to increase, the traditional 48V/54V architecture is beginning to be constrained by high currents, busbar weight, space, and conversion losses. The significance of 800V DC lies in moving some power conversion from inside the rack forward to the Power Rack or facility side, and then feeding high-voltage DC into the rack, stepping it down in stages to 50V, 12V, 6V, or even below 1V near the GPU. For power semiconductor manufacturers, this is equivalent to redefining the entire power chain.
"ROHM is one of the few semiconductor manufacturers globally that possesses SiC, Si, and GaN components along with drive and control analog technologies. We are committed to establishing partnerships with leading global enterprises to provide end-to-end power solutions covering power products for AC-DC, DC-DC, CPUs, GPUs, and SSDs," stated Su Yongjin. He added that ROHM's approach in this architecture is not to bet on a single material, but to allocate SiC, GaN, and Si according to different voltage and power levels.
On the high-voltage side, SiC comes first. The 800V bus directly faces high switching voltages and power levels, requiring a balance between efficiency, voltage tolerance margin, and thermal reliability. Therefore, 1200V SiC is more suitable for stages such as PFC, the primary side of LLC, and high-voltage DC/DC. In ROHM's publicly available 800V PLECS reference circuit, the 800V input, 50V output, default 10kW/100kHz DC/DC solution uses 1200V SCT4018KR SiC on the primary side, indicating that its SiC layout has begun to extend from traditional automotive inverters to high-voltage power supplies for AI servers.
However, using SiC for the entire chain does not align with system optimization. The further towards the intermediate stages, the higher the importance of switching frequency and power density, and the value of GaN begins to stand out. ROHM's EcoGaN™ has entered actual server applications, with 650V TOLL EcoGaN™ being adopted in Murata Power Solutions' 5.5kW AI server power supply; meanwhile, the latest GNP30xx series continues to evolve towards lower on-resistance and higher power density. More notably, ROHM has further integrated GaN HEMTs, Si Gate Drivers, and protection functions into a Power Stage, meaning the focus of GaN competition is shifting from a single transistor to the synergy of devices, drivers, and protection.
Further towards the low-voltage side, Si MOSFETs actually regain the advantage. The reason is not complicated: when the voltage drops to 48V, 50V, or even lower, breakdown voltage is no longer the primary concern; low Rds(on), cost, maturity, and high-current capability become more important. In ROHM's 800V to 50V reference circuit, an 80V RS7N200BH is used for low-voltage side synchronous rectification; while at the server 48V Hot Swap position, Wide-SOA MOSFETs such as RY7P250BM are deployed. The latter emphasizes not high-frequency switching capability, but the safe operating area to withstand surges and hot-swap transients in the linear region.
When truly approaching the GPU core, power design enters another logic. At this point, the core voltage has dropped below 1V, while current rises rapidly, making multi-phase power delivery critical. ROHM has publicly released the BD964A01 16-phase MPC controller, as well as the BD965A01 and BD966A01 DrMOS for 6V and 12V inputs, targeting low-voltage, high-current POL for GPUs/CPUs. However, the maturity of public information for these products is still significantly lower than that of SiC and GaN. Complete datasheets, efficiency curves, and some electrical parameters have not been fully disclosed yet, making it more appropriate to view this as an ongoing Grid-to-Chip layout being filled in, rather than a fully mature mass-production product chain.
Su Yongjin also mentioned: "ROHM's products also support the next-generation 800V DC architecture, helping AI servers achieve higher density and lower power consumption." For ROHM, the key to the next stage of competition is not just whether a single device parameter can lead, but whether these different materials and control ICs can be truly combined into a complete power solution that can be rapidly deployed by server customers.
Automotive SoCs Increasingly Resemble Servers: Why is ROHM's PMIC Also Beginning to "Split"?
The evolution of intelligent cockpit and ADAS SoCs is changing the design logic of automotive power supplies. In the past, a single multi-channel PMIC could often complete the power supply for major rails such as the SoC core, DDR, I/O, and analog circuits. However, as modules like CPUs, GPUs, NPUs, safety islands, and ISPs continue to increase, SoCs are no longer just "more functionally complex," but are beginning to exhibit characteristics similar to server processors: core voltages continue to drop, peak currents rise, load changes are faster, and stricter power-up sequencing, monitoring, and functional safety requirements must be accommodated simultaneously.
This change directly drives PMICs from "highly integrated" towards "hierarchical expansion." The approach ROHM currently proposes for high-performance automotive SoCs is to form a power system jointly composed of a Main Configurable PMIC, Sub PMICs, and DrMOS. The Main PMIC handles basic power rails, sequencing control, and safety management; Sub PMICs are used to increase the number of power rails; and high-current CPU/GPU/NPU Core Rails are expanded through external DrMOS. In other words, the functions that were previously crammed into a single large PMIC are now being re-split according to "control" and "power." Su Yongjin stated: "Through the combination of PMIC and DrMOS, we achieve power designs more suitable for SoCs and meet the needs of future high-performance requirements."
The evolution of the Telechips platform is a relatively intuitive example. The 2024 ROHM reference design for Dolphin3 mainly adopted the BD96801Qxx-C Main PMIC; by the time of Dolphin5, which has more complex computing power and peripherals, the public solution has expanded to include the BD96805Qxx-C Main PMIC, BD96806Qxx-C Sub PMIC, BD96811Fxx-C PMIC, and two independent Bucks. Dolphin5 itself integrates CPUs, GPUs, NPUs, multiple Camera/ISP, and Display modules, and the power solution has accordingly moved from a single PMIC to the synergy of multiple power devices.
Behind this is first the issue of current expansion capability. Traditional PMICs integrate MOSFETs internally, which can reduce peripheral components and PCB area, but the output capability is basically fixed at the time of product definition. The internal MOSFET of ROHM's BD96806 can provide 5A per channel, and a two-phase combination can be expanded to 10A; if an external BD96340MFF-C DrMOS is connected, a single DrMOS can provide 20A continuous and 30A peak current. In this way, designers can increase the power stage according to the SoC grade and core rail requirements, without having to redesign the entire PMIC just because the current of a certain rail increases from 10A to 20A or even higher.
The second change comes from thermal design. The CPUs, GPUs, and NPUs of high-performance SoCs may form high-current rails simultaneously. If all power MOSFETs are concentrated inside the PMIC, conduction and switching losses will also be concentrated in a single package. By making the DrMOS independent, the heat sources of different phases can be distributed to different locations on the PCB, while the current borne by each phase is reduced through multi-phase power delivery. This design concept is already quite close to server CPU/GPU VRMs: multiple low-power rails continue to be integrated by the PMIC, while core high-current rails gradually become modularized and multi-phased.
"Splitting" also has a more practical value: improving platform scalability. The same basic architecture can select a Main PMIC, Main+Sub, or further increase DrMOS according to different SoC and vehicle model configurations, without having to redevelop a "large and all-inclusive" PMIC for each generation of processors. For automotive platforms, this reusability is particularly important because the same vehicle model often has different computing power grades simultaneously, and the SoC upgrade cycle is also shortening. The number of power rails and Core Rail current can be expanded separately, which is equivalent to splitting two parameters that were previously bound together.
However, a multi-chip architecture does not necessarily mean the system is simpler. After the number of devices increases, PCB routing, communication, fault monitoring, and shutdown logic will all become more complex. Especially in ADAS and central computing, the Main PMIC, Sub PMIC, and multiple DrMOS must clearly define which level is responsible for detecting overcurrent, when to shut down, how faults are fed back, and what Safe State the system enters after an anomaly occurs. In other words, modularity brings Scalability, while simultaneously increasing the difficulty of system-level functional safety design. The materials also specifically point out that the true barrier in the future is not only whether Main PMICs and DrMOS can be provided, but whether multiple power chips can be organized into a complete power system capable of completing ASIL verification.
Therefore, ROHM's beginning to "split" PMICs does not mean a reversal in the development direction of integration. For cameras, low-end cockpits, or medium-to-low power SoCs, a single PMIC remains the more economical choice; only when the number of SoC rails, core current, and safety complexity cross a certain threshold will the advantages of Main PMIC+Sub PMIC+DrMOS gradually emerge.
From 1.2kV to Higher Voltage: ROHM's SiC Begins to Move from "Component Substitution" to "Topology Substitution"
If the most important task of SiC over the past decade has been to gradually replace IGBTs in NEV inverters, photovoltaics, and industrial power supplies, then in the era of 1500V photovoltaics, energy storage, and next-generation SSTs, the value of SiC is undergoing a new change: voltage tolerance improvements are beginning to directly affect the system topology itself.
Speaking of the renewable energy market, Su Yongjin stated: "In the renewable energy market, the voltages of photovoltaic (PV) and energy storage systems (ESS) are continuously increasing, and the grid is becoming increasingly intelligent. ROHM helps reduce power conversion losses and achieve system miniaturization through higher voltage SiC devices as well as GaN and Si devices."
Traditional 1200V SiC is already quite mature on 1000V-class DC buses, but when facing a 1500V DC Link, a single 1200V device cannot directly bear the full bus voltage. Engineering practices usually require adopting three-level topologies, connecting more power devices in series, or introducing more complex neutral point and voltage balancing designs. Although 1700V devices have a higher rated voltage tolerance, the margin left for switching overshoot, bus fluctuations, and long-term reliability in 1500V systems is still limited. Therefore, higher voltage SiC is beginning to enter a previously relatively vacant voltage window. More accurately, 1500V systems are high enough that 1200V devices must increase topological complexity, yet not high enough to require the comprehensive adoption of 3.3kV devices; 2kV sits exactly between the two.
This is also the key background for ROHM emphasizing higher voltage SiC this time. The significance of higher voltage tolerance is not just increasing the device voltage tolerance from 1.2kV to 2kV, but giving some 1500V photovoltaic and energy storage systems the opportunity to return from three-level to a simpler two-level architecture. For traditional 1200V solutions, a high-voltage switching position may require more MOSFETs, Drivers, voltage balancing, and protection circuits; after switching to a single 2kV device, there is room to reduce the number of power devices, drivers, and control complexity. In particular, for series device solutions, dynamic voltage balancing issues caused by differences in Vth, Qg, Coss, driver delay, and parasitic inductance must also be handled, whereas a single high-voltage device can directly eliminate this type of design burden.
ROHM's higher voltage SiC is no longer just a technical showcase. Its 2kV SiC MOSFET has entered mass production and has been integrated by Semikron Danfoss into the SEMITRANS 20 power module, further adopted by SMA's new generation Sunny Central FLEX large-scale photovoltaic/energy storage platform. The corresponding SKM1700MB20R4S2I4 module is rated at 2000V and 1585A, using ROHM's fourth-generation SiC chip. In other words, in 1500V photovoltaic and energy storage scenarios, ROHM's 2kV SiC has crossed the "device verification" stage and begun entering real systems.
Behind this is a change in the logic of SiC competition. In the past, manufacturers mostly compared Rds(on), switching losses, chip area, and junction temperature; at the 2kV stage, customers are beginning to care more about whether a high-voltage device can help the system reduce a switching layer, reduce Drivers, and simplify busbars and control algorithms. In other words, the unit for evaluating SiC is shifting from a "single MOSFET" to an "entire Converter."
Of course, 2kV will not simply replace 1200V. The two-level 1500V solution faces larger voltage transitions in a single switch, increasing dv/dt, common-mode EMI, insulation, and filtering pressures; in contrast, although the 1200V three-level has more devices, the voltage and switching stress borne by each device is lower, and the FOM of the lower voltage tolerance MOSFET itself is usually better. Therefore, in the future, 1500V photovoltaics and energy storage are more likely to see two routes coexisting: 1200V+three-level emphasizes device maturity and lower electrical stress, while 2kV+two-level emphasizes system simplification and power density.
What ROHM Really Wants to Do May No Longer Be Just a Pure Power Device Supplier
Finally, looking at the three product lines of AI servers, automotive SoCs, and higher voltage SiC together, it can be seen that ROHM is attempting to reorganize the previously relatively scattered power devices, drivers, and analog power products into power combinations oriented towards specific systems.
This change is most obvious in AI servers. ROHM no longer displays products solely by device categories such as SiC, GaN, and MOSFET, but organizes products according to system nodes such as Power Supply, 800V, Main Board, CPU/GPU, and SSD, placing SiC, GaN, Wide-SOA MOSFETs, MPC+DrMOS, Hot Swap, and SSD PMICs in the same power chain. Its goal has extended from a certain stage of DC/DC conversion to Grid-to-Chip power delivery from the high-voltage bus all the way to near the GPU.
The logic in the automotive field is also very similar. Main Configurable PMICs, Sub PMICs, and DrMOS undertake different tasks within the same SoC power system: the PMIC is responsible for power rails, sequencing, and safety; the Sub PMIC provides expansion capability; and the DrMOS solves the high-current requirements of the CPU, GPU, and NPU core rails. ROHM is shifting some of the system combination work that was previously done by customers themselves towards the chip supplier side.
In photovoltaics and energy storage, higher voltage SiC represents another type of system extension. Here, the value ROHM provides is no longer just higher voltage tolerance MOSFETs, but rather hoping that through device voltage tolerance improvements, customers have the opportunity to shift from complex solutions like three-level topologies and device series connections to simpler two-level topologies. SiC thus begins to affect the number of Drivers, control methods, busbars, thermal management, and even the overall machine BOM.
These three markets seem far apart, but the underlying logic is actually highly consistent: relying on SiC on the high-voltage side, introducing GaN for medium-to-high frequency power conversion, continuing to use Si MOSFETs for low-voltage high-current applications, and then connecting different devices through Drivers, PMICs, MPCs, and DrMOS. ROHM's "Power + Analog" layout in AI servers is essentially hoping to combine capabilities that were originally scattered across different chips and different design stages. When introducing ROHM's LSI business, Su Yongjin also mentioned: "In addition to its expertise in analog technology, ROHM also possesses digital processing technologies led by MCUs, capable of integrating analog, power electronics, and digital technologies to create high value-added products."
However, there is still a long way to go from "having a sufficiently wide product line" to "truly establishing system solutions." The maturity of different stages at ROHM is currently inconsistent: the 4th generation SiC, some EcoGaN™, and Wide-SOA MOSFETs already have clear mass-production products, while the GPU-side MPC+DrMOS, SSD PMICs, and complete 800V server solutions are just beginning. More accurately, ROHM is extending from a traditional power device and analog IC supplier towards a more complete power system platform direction.