Shanghai, September 20, 2026 — Today, the 11th Shanghai FD-SOI Forum was grandly held at the Grand Ballroom on the 3rd Floor of the Pujiang Wing, Shangri-La Hotel, Pudong, Shanghai.
As one of the most influential annual events in the global FD-SOI (Fully Depleted Silicon-On-Insulator) technology field, this forum gathered top enterprises, academic institutions, and industry experts from the global semiconductor industry chain to explore the latest breakthroughs and industrialization paths of FD-SOI technology in frontier fields such as Edge AI, automotive electronics, and 5G/6G communications.
The forum officially kicked off with the opening address by Wayne Dai, Chairman, CEO, and President of VeriSilicon. Wayne Dai has long been committed to promoting the development of the FD-SOI ecosystem in China. Under his leadership, VeriSilicon has become a key player in the field of FD-SOI design implementation.

Figure | Opening address by Wayne Dai, Chairman, CEO, and President of VeriSilicon
Tracing back to the origin of the technology, as early as 2001, the team led by Chenming Hu at the University of California, Berkeley, proposed two CMOS technology paths for nodes below 20nm: the 3D FinFET transistor and the 2D FD-SOI fully depleted transistor.
Wayne Dai pointed out that the two are not in a substitutive or competitive relationship, but rather complementary solutions that allow the semiconductor industry to pursue a dual-track approach.
- FinFET excels in high-performance computing, catering to high-computing-power scenarios such as cloud servers and high-end consumer electronics;
- FD-SOI, relying on its ultra-thin channel and fully dielectric-isolated architecture, boasts unique advantages including low power consumption, excellent RF performance, and high integration of analog and digital circuits, making it more suitable for IoT (Internet of Things), autonomous driving, millimeter-wave radar, aerospace, long-standby terminals, and Edge AI.
From 2024 to 2026, advanced nodes in the global FD-SOI landscape have witnessed a series of intensive breakthroughs.

Figure | Milestone events in the FD-SOI industry
ST and Samsung jointly launched the 18nm FD-SOI process, integrating embedded phase-change memory (ePCM) to achieve simultaneous upgrades in performance, power consumption, and storage capacity. The STM32V8 industrial MCU based on this process has been shipped in the first quarter of 2026.
Supported by the European Chips Act, the European FAMES pilot line is tackling 10nm/7nm FD-SOI with a total budget of EUR 830 million. In 2026, it has delivered the 10nm exploratory PDK, steadily advancing towards more advanced processes.
In China, FD-SOI has established a clear generational development roadmap: G1 (28/22/20nm), G2 (18/14/12nm), and G3 (10nm and below 7nm). Soitec and Xin'ao Xinyi provide 12-inch FD-SOI substrates to ensure the supply chain; SOI Micro has completed its Series B funding and will build the first domestic mass production line for FD-SOI, filling the critical gap in local manufacturing.
In terms of application markets, FD-SOI technology deeply empowers automotive electronics, IoT wearables, Edge AI, 5G/6G millimeter-wave communications, and satellite aerospace, covering a wide range of scenarios including automotive MCUs, radar chips, V2X, AI terminals, and RF front-ends. Market data shows that the target market for FD-SOI will continue to expand at a high speed. It is estimated that by 2030, the monthly equivalent wafer demand will reach 1.276 million pieces, with Edge AI becoming the core growth driver.

Figure | FD-SOI market size
In his address, Wayne Dai called for global industry chain collaboration in the development of the FD-SOI industry. From substrates, manufacturing, and IP design to terminal applications, the upstream and downstream sectors must openly co-build the ecosystem. VeriSilicon will continue to share its mass production experience in body bias design, embedded MRAM, and 3D heterogeneous integration, helping more customers seize the development dividends in the era of edge intelligence.