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Computing-in-Memory: Yizhu Technology’s 3D DRAM Chip to Tackle AI’s Token Speed and Memory Wall Crisis

by bandaotichanyezongheng·August 10, 2026

At the World Artificial Intelligence Conference (WAIC) 2026, the topic of AI computing power remains as hot as ever. As model sizes continue to expand, the Mixture of Experts (MoE) architecture becomes the mainstream for large models, and Agent task chains keep extending, "Token output speed" has become the most sensitive metric for paying users. A question is becoming increasingly sharp: How much longer can our existing AI chip architectures last?

With this question in mind, Semiconductor Industry Insights interviewed Xiong Dapeng, founder, chairman, and CEO of Yizhu Technology. In his view, AI large models are essentially "imitating the human brain," and the way the human brain works—Computing-in-Memory (CIM)—might just be the ultimate answer to this computing power revolution. And his thinking starts from the most fundamental architectural contradictions.

01. From Near-Memory Computing to Computing-in-Memory

"Traditional AI large model chips are basically based on a separated memory and computing architecture. Memory is just memory, and computing is just computing." Xiong Dapeng straightforwardly pointed out the biggest pain point of current AI chip architectures. Under this architecture, massive amounts of data are transported back and forth and distributed between memory and computing units, leading to two fatal issues: extremely high power consumption caused by data transportation, and extremely low effective computing utilization rate caused by data congestion. Xiong Dapeng stated, "The vast majority of power consumption is spent on data transportation and data distribution."

To alleviate this contradiction, the industry has begun to intensively deploy the Near-Memory Computing route in recent years, shortening data transportation distances and expanding data bandwidth through technologies like 3D stacking and HBM (High Bandwidth Memory). However, in Xiong Dapeng's view, this is still not the fundamental solution: "Essentially, Near-Memory Computing aims to shorten the distance of data transportation, but its computing structure remains the traditional computing architecture." The true direction of transformation is Computing-in-Memory (CIM). The concept of CIM did not emerge out of nowhere. As early as 1969, Kautz and others at the Stanford Research Institute took the lead in proposing the concept of a computing-in-memory computer. However, limited by the technology and processes of the time, the concept remained only at the theoretical research stage and was not practically applied. As semiconductor technology matures and the massive parameters in the AI large model era bring about huge data transportation demands, CIM has regained the industry's attention. Xiong Dapeng explained, "The computing architecture of CIM is memory-centric. By adding appropriate logic inside or around the memory medium, it becomes a computing array. All computations are completed while the data flows out of the memory medium." CIM completely eliminates the hierarchical structure of multi-level caches at the architectural level, performing computations directly in the computing-in-memory array, fundamentally preventing the high power consumption and data congestion caused by data transportation.

Looking at a deeper level, the working mechanism of AI large models themselves is highly similar to the human brain. Xiong Dapeng further elaborated, "The essence of AI large models is computing-in-memory. A massive amount of knowledge is compressed and stored in our brains; reflected in large models, this is parameters. When external input comes in, we can quickly find the corresponding knowledge interval and give judgments and decisions through the reasoning mechanism. From the perspective of chips, this is the working principle and underlying logic of CIM." It is precisely for this reason that CIM demonstrates advantages that traditional architectures can hardly match in specific scenarios, especially for applications with long text input/output and high requirements for low latency. Users willing to pay often require Token output speeds to reach 100, 200, or even over 300 per second. Whether it is programming or short video editing, such efficiency is needed. This is a struggle for traditional architectures, but CIM handles it with ease.

02. The "Two Mountains" of Computing-in-Memory: Capacity and Precision

Despite the huge theoretical advantages, on the road to large-scale commercialization, the industry has long faced "two mountains."

The first mountain is memory capacity. The memory medium of CIM chips directly determines the model scale it can carry. Currently, CIM media in the industry are mainly divided into two categories: emerging non-volatile memories such as RRAM, MRAM, and PCM, and mature traditional volatile memories such as SRAM and DRAM. Analog CIM and SRAM digital CIM prototypes built on emerging memories mostly have a single-chip capacity of only the MB level; ordinary 2D DRAM has sufficient capacity, but its native structure is not suitable for CIM chips.

This is a structural problem. The core concept of CIM is the deep integration of "memory" and "computing," and "external memory cannot be attached, just like our human brain." This means the memory capacity of the chip itself directly determines how large the model parameters it can accommodate. For large models with tens of billions or even hundreds of billions of parameters, MB-level on-chip memory is obviously a drop in the bucket; while conventional 2D DRAM lacks CIM design, its adaptability in cloud large model inference scenarios is relatively limited.

The second mountain is computing precision. Early CIM took the "analog computing" route, mainly using memristors (generally RRAM) as the memory and computing medium. Its basic principle is to use Ohm's Law and Kirchhoff's Laws in a memristor crossbar array to complete matrix-vector multiplication in one step through voltage driving and current accumulation. This "analog CIM" can theoretically achieve extremely high computing parallelism and energy efficiency. However, reality often falls short of the ideal. Analog computing is extremely sensitive to the non-idealities of devices. Factors such as resistance drift of memristors, temperature changes, process variations, and noise interference will directly translate into computing errors. Moreover, in multi-layer convolution and matrix multiplication operations in neural networks, errors in each layer continuously accumulate, which will ultimately significantly reduce the task inference accuracy, and the stability is even worse under extreme temperature changes and long-term working scenarios.

Limited by capacity and precision, the application scenarios of CIM chips have long been compressed to edge AI, a field with limited requirements for computing power and model scale. To build cloud-based high-computing-power chips is, in the eyes of many, almost a pipe dream.

03. Yizhu Technology's Solution: General-Purpose CIM + 3D DRAM

How to break through the bottlenecks of capacity and precision, and integrate CIM into cloud high-computing-power chips? Yizhu Technology's solution is the fully digital 3D DRAM general-purpose CIM chip.

In terms of computing precision, Yizhu Technology's digital CIM has abandoned the "shortcut" of analog computing and returned to the determinism of digital circuits, fundamentally eliminating the precision loss caused by device non-idealities and providing a guarantee for the high-precision computing required for large model inference. "Full digitalization is to solve the problems of low data precision and unreliable quality existing in analog CIM," Xiong Dapeng stated in a nutshell. The advantages of digital CIM lie in its high precision, strong fault tolerance, and ease of architectural integration. In addition, because the digital CIM architecture processes digital signals and is mostly based on traditional memory, it also has more advantages in the reliability of data storage and manufacturing costs. In terms of memory capacity, Yizhu Technology chose 3D DRAM. "For CIM, the size of memory capacity is a crucial parameter. We can use the brain as a popular analogy: the larger the information capacity the brain can carry, the more complex tasks it can handle; the same is true in the biological world, and future models will definitely be larger and larger." Xiong Dapeng used a vivid metaphor, "Considering capacity, stability, and cost-effectiveness, 3D DRAM is the best, and it will be made even larger in the future. 3D stacking not only increases capacity but also significantly boosts memory bandwidth and data throughput capabilities. The continuous generation process of large model Tokens highly relies on high-speed data transmission. Large capacity combined with high bandwidth directly determines the final inference output efficiency." Capacity and cost are the fundamental reasons for Yizhu Technology's choice of 3D DRAM. 3D DRAM provides the physical foundation for CIM chips to break through the "MB-level ceiling" and step towards GB or even higher capacities.

Of course, the breakthrough at the technical level is just the first step. Xiong Dapeng emphasized, CIM is essentially an IP that can only complete limited specific computations, such as matrix computations; to make it a truly implementable product, it must be closely integrated with general-purpose computing. "We call it a general-purpose high-computing-power chip based on CIM, which can be simply understood as CIM + GPU." The word "general-purpose" here is crucial. "AI large models are also changing every day. Today, it is mainly large language models; in the future, it might be physical large models, or even a combination of both. If we make a dedicated chip, it might be inapplicable in two or three years." The general-purpose CIM route not only retains the advantages of CIM in energy efficiency and latency but also ensures compatibility with mainstream ecosystems including CUDA and adaptability to future algorithm evolution by integrating general-purpose computing units such as GPUs.

Specifically at the chip architecture level, Yizhu Technology's solution is a complete general-purpose computing power platform, rather than an accelerator card. The key lies in the complete self-developed ISA (Instruction Set Architecture), hardware-software co-design architecture, and dual IPs for general-purpose and CIM, enabling the chip to support end-to-end AI computing tasks. In this architecture, the CIM unit is responsible for efficiently processing compute-intensive and fixed-parameter computation types such as matrix operations and linear operations, without the need to repeatedly load from external memory (such as HBM) before computation. Meanwhile, the general-purpose SIMT (Single Instruction, Multiple Threads) unit is responsible for processing computations with complex and irregular control logic (such as the activation function SiLU, normalization RMSNorm, data rearrangement, etc.) as well as general scalar and logical operations. This design, while obtaining the extremely high energy efficiency of CIM, retains the programming model and generality of GPUs, avoiding the flexibility and programming difficulties faced by pure analog CIM architectures, and is the hardware foundation for achieving compatibility with mainstream ecosystems such as CUDA. Based on this whole set of judgments, Yizhu Technology has completed technical verification and officially launched its first-generation commercial AI chip, the fully digital 3D DRAM general-purpose CIM chip.

04. Three Laws and Endgame Deduction: More Than Just a Chip

However, Xiong Dapeng's thinking does not stop at a single product. At the WAIC 2026 site, he refined these practical insights into systematic industry judgments and proposed the "Three Major Industry Laws of General-Purpose CIM" for the first time.

The first law is the Law of Transportation Cost. In AI computing, the power consumption and latency cost of data transportation are 100 times that of the computation itself. Every revolution in computing architecture is essentially a revolution in data transportation. Whoever can eliminate data transportation to the greatest extent will get the ticket to the next era. The second law is the Law of General-Purpose Boundary. The efficiency advantage of any dedicated computing unit will be leveled out by the ecosystem advantage of general-purpose computing. Technologies that only solve a single problem, no matter how good their parameters are, will ultimately only become a supplement to general-purpose computing and will not become the mainstream computing platform. In Xiong Dapeng's view, CIM is an innovative architecture, but how to well integrate this innovative architecture with the traditional general-purpose computing GPU architecture is crucial; otherwise, the huge computing power dividend brought by CIM might be offset. The third law is the Law of Heterogeneous Endgame. There is no single computing unit that can simultaneously meet the three requirements of "zero transportation, fully general-purpose, and high scalability." The endgame of CIM is inevitably heterogeneous collaboration: dedicated units do dedicated things, and general-purpose units do general-purpose things, achieving 1+1>2 through architectural innovation. Xiong Dapeng further explained that CIM only efficiently implements matrix multiplication and matrix addition, but for general-purpose computing, there is much more than this. Although matrix computation accounts for 98% or 99% of the computing workload, general-purpose computing must never be ignored.

These three laws outline the underlying logic of industry evolution. Based on these three laws, Xiong Dapeng gave three judgments on the technical routes for the future of the industry: "First, CIM chips themselves will be highly integrated with GPU general-purpose computing. Second, traditional GPGPU chips will also draw on the advantages of CIM and develop towards CIM or general-purpose CIM. Including NVIDIA's acquisition of the Groq team also confirms this development direction. Third, within two to three years, GPU and CIM general-purpose computing will have a synergistic relationship, each with its own strengths and weaknesses." Taking the PD (Pre-fill&Decode) inference process as an example, the traditional architecture performs well in the pre-fill stage, while CIM has quite obvious advantages in the decoding stage. Through the synergy of "general-purpose computing + CIM," the two can achieve the optimal solution from the overall scheme.

In the future, Yizhu Technology will also continue to lay out roadmaps targeting these technical directions. On the technical route, it will continuously optimize the ultra-heterogeneous integration of CIM and traditional computing. It makes users feel the same as using traditional GPUs, with the same development tools, the same development platforms, and the same programming models, ready to use out of the box. The benefits brought are: significantly improved performance, significantly reduced energy consumption, and significantly simplified software programming. On the product route, starting from the first-generation cloud high-computing-power chip, it will continuously iterate and extend to broader scenarios such as supernodes and large edge sides (such as intelligent robots). On the ecosystem route, taking AI cloud operators as the entry point, it will simultaneously cover large model enterprises and large model developers in various vertical fields, while focusing on cultivating the software ecosystem.

In this AI revolution with the ultimate goal of "imitating the human brain," CIM should no longer be the "supporting role" relegated to the edge side, but should move towards the cloud, towards general-purpose, and towards deep integration with GPUs. And Yizhu Technology is trying to take the first step on the starting line with a "CIM + GPU" general-purpose high-computing-power chip.

 

[AI Superposition] Issue 14: Yizhu Technology. Founded in Shanghai by Dr. Xiong Dapeng, who has nearly 30 years of experience in the chip industry in China and the US, it is the first domestic AI high-computing-power chip company with a fully digital 3D DRAM general-purpose CIM architecture. The company officially started operations in 2022, with its headquarters in Suzhou and subsidiaries in Shanghai, Hangzhou, Chengdu, and Changsha. The team has nearly 300 people, with R&D personnel accounting for over 80%. As of 2026, the company has completed multiple rounds of financing with a total amount of over one billion RMB. In November 2025, the company launched a domestic CIM AI computing power platform project for intelligent computing clouds, planning to invest 500 million RMB over the next five years to build an innovation center and demonstration base, expecting to achieve an annual output value of over 1 billion RMB. The company pioneered the fully digital general-purpose CIM architecture, fundamentally breaking the memory wall, extremely reducing data transportation and power consumption, and achieving a multiple-fold improvement in computing power energy efficiency.