In 2025, the global Compute-In-Memory (CIM) chip market is experiencing explosive growth.
According to data from industry research firm IIM, based on a broad scope of the CIM architecture industry (including chips, modules, IP licensing, etc.), the global market size exceeded $12 billion in 2025, with China accounting for approximately 35%. By the first quarter of 2026, the market size had already surpassed $8.72 billion.
Meanwhile, statistics from QYResearch focusing on the CIM AI chip segment show that global sales were approximately $231 million in 2025 and are projected to surge to $44.33 billion by 2032, representing a compound annual growth rate (CAGR) of up to 112.4%.
Behind these figures lies an ongoing revolution in chip architecture. Driven by capital enthusiasm and policy support, and transitioning from research breakthroughs to product deployment, CIM is moving from an academic concept to a commercial reality at an astonishing pace.
01. What Is Compute-In-Memory?
To understand CIM, one must first grasp the dilemma of traditional chips. Almost all the chips we use today—CPUs in computers, SoC (System on Chip) in smartphones, and GPUs for AI training—follow the von Neumann architecture, where memory and computing units are physically separated. When a chip performs computations, data must first be "transported" from memory to the computing unit, and then "transported" back after processing. This architecture has been in use for over seventy years, but in the era of large AI models, its flaws are fully exposed.
Over the past two decades, processor performance has improved at an annual rate of approximately 55%, while memory performance has only grown by about 10% per year. Accumulated over time, the speed gap between the two has reached several orders of magnitude. Even more striking is the power consumption—multiple studies show that the energy consumed to transport 1 bit of data from DRAM to a CPU is several to dozens of times higher than the energy required to process that bit on the CPU itself. According to research by Intel, when semiconductor technology reached the 7nm node, data transport power consumption reached as high as 35pJ/bit, accounting for 63.7% of total power consumption. Turing Award winner John Hennessy pointed out even more bluntly that the cost of data transport in AI computing has reached 100 times the cost of computation.
What CIM aims to do is to put an end to this waste of "data movement." Its core concept is straightforward and direct—embedding computing circuits directly into the memory array so that data is "computed right where it is stored." By modifying the "read" circuit of the memory unit, computation is completed simultaneously with data reading, and the results are written directly back to the memory. Data no longer needs to travel long distances, naturally leading to a significant reduction in power consumption and latency.
Currently, CIM is evolving along two technical paths. Analog CIM utilizes the physical characteristics of new storage media such as memristors to compute directly in the analog domain, offering extremely high energy efficiency and suitability for high-throughput tasks like image processing and low-precision neural network inference. Digital CIM, on the other hand, integrates digital logic circuits inside or near memory units like DRAM, maintaining high precision and versatility, making it more suitable for supporting large model inference. The two paths have different focuses but share the same goal—breaking down the "wall" that has plagued the chip industry for decades.
02. From Lab to Market, CIM Is Accelerating Its Pace
CIM is far from a novel concept, having been proposed as early as the 1990s. However, it was not until recent years, with the explosive growth in AI computing power demand, that it was truly pushed into the spotlight.
From a policy perspective, China's outline for the 15th Five-Year Plan has listed CIM, 3D stacking, and optoelectronic integration together as frontier architectures for next-generation IC (Integrated Circuit) technologies. Provinces such as Hubei are accelerating the layout of CIM industry clusters. The national strategic direction has injected a strong boost into industrial development.
Application scenarios are also expanding rapidly. According to statistics from industry research firm IIM, the proportion of global smartphones equipped with CIM AI acceleration modules reached 19.4% in 2025, corresponding to a shipment volume of 783 million units. In the automotive sector, the installation volume of domain controllers integrating CIM architecture in L3 and above vehicles reached 3.2 million sets. The industry expects that as the CIM industry ushers in its first wave of industrialization from 2026 to 2028, the large-scale deployment in scenarios such as smart glasses, in-vehicle cockpits, industrial inspection, and medical care is accelerating.
03. Beneath the Glamour, Shortcomings Cannot Be Ignored
The prospects for CIM are exciting, but it is far from a time to rest on its laurels.
The biggest challenge is the software ecosystem. Current AI development is highly dependent on mature software systems represented by CUDA. Even if the hardware of a new architecture is outstanding, developers will be reluctant to use it if it cannot be compatible with mainstream toolchains. As industry insiders point out, the market usually chooses not just hardware with extreme parameters, but general solutions with controllable development costs and a rich ecosystem. For CIM to pierce a gap in the ecosystem barrier of GPUs, it requires not only chip design capabilities but also full-stack capabilities ranging from instruction sets and compilers to operator optimization tools.
Divergences in technical paths have yet to converge. Although analog CIM offers extremely high energy efficiency, it faces issues such as limited computational precision, significant impact from process, voltage, and temperature variations, and poor scalability. Digital CIM ensures precision, but falls short of analog solutions in terms of energy efficiency and parallelism. Both paths have their own shortcomings, and the industry has yet to form unified technical standards.
Industrial maturity remains insufficient. Overall, the CIM chip market is still in the early stages of commercialization. Participants are mainly startups and industrialization teams from research institutions, with products mostly being prototype chips or customized solutions. Mature standards and ecosystems have yet to be formed. Traditional GPUs, NPUs, and ASICs still dominate the mainstream market. Some critics even bluntly state that CIM is "unfeasible in its ideal form and meaningless in its compromised form"—although this view is overly extreme, it reminds us that there is a long distance between any new technology going from concept to large-scale commercial use.
Constraints from advanced process nodes are equally worth attention. The technological blockade on advanced chip processes, coupled with the inherent limitations of traditional architectures, makes computing power density, software and hardware ecosystems, and data bandwidth a triple pressure restricting industrial upgrading. How to achieve high performance on mature process nodes is a task that domestic CIM chips must face.
In summary, CIM is at a critical juncture—technical feasibility has been verified, market demand genuinely exists, and it enjoys dual support from policy and capital, but it has not yet crossed the threshold from "usable" to "user-friendly." In the coming years, whoever can solve the compatibility issues of the software ecosystem first, and whoever can find the optimal solution in the strategic game of technical paths, will take the lead in this revolution of chip architecture. For the entire industry, whether CIM can truly become the new computing power foundation in the "post-Moore era," the answer may gradually be revealed during this wave of industrialization from 2026 to 2028.
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