Recently, the EDA and IP concept sectors in the A-share market have become a market hotspot. On July 6, Primarius Technologies hit the 20% daily limit up, Empyrean Technology surged nearly 15%, and Semicentury Software, VeriSilicon, and Anlogic all saw significant gains; in the following days, the sector's momentum continued to spread. Behind this market performance is not a single event driver, but a resonance of multiple industrial factors occurring simultaneously, pointing to the same proposition: domestic EDA and IP are transitioning from "strategic reserves" to "strategic imperatives".
Industrial Resonance of Multiple Factors
Huawei's "Tao's Law" V2: EDA as the "Largest Increment" in Logic Folding
On July 3, He Tingbo, head of Huawei's semiconductor division, released Version 2 of the "Time Miniaturization Theory for Multi-Level Electronic Systems." Compared to V1 released on May 25, the new version supplements extensive engineering implementation details, measured quantitative data, and product evolution roadmaps, perfecting the post-Moore scaling theory system centered on the time constant τ. A research report by BOCOM International pointed directly to the core: "Logic folding is the core engineering practice of Tao's Law, advanced packaging is the process foundation, and the EDA toolchain represents the largest incremental opportunity for logic folding." In other words, as chip performance improvement shifts from "process scaling" to "architecture efficiency-driven," EDA tools must evolve from single-chip design to 3D-native, package-level co-optimization.
Synopsys "Voluntarily Exits," Yielding Structural Space in Segmented Markets
Global EDA leader Synopsys recently informed customers of its intention to discontinue two manufacturing software tools: EES (Equipment Engineering System) and FDC (Fault Detection and Classification). These two tools directly serve yield management in the wafer fab manufacturing process and are indispensable infrastructure for production lines. Synopsys's choice to concentrate resources on high-growth tracks such as AI chip design proactively yields the segmented market for manufacturing EDA. For domestic EDA, this creates an opportunity generated by the voluntary withdrawal of an international giant rather than forced substitution.
Surge in Domestic AI Computing Orders Accelerates Transmission from Chips to Tools
Meanwhile, domestic computing orders are increasing, and market fervor is transmitting from chip design to the EDA/IP toolchain. In the first quarter of 2026, VeriSilicon's revenue reached 836 million RMB, a year-on-year increase of 114.47%, with AI computing-related newly signed orders accounting for as high as 91.37% (8.24 billion RMB); Empyrean Technology's EDA tools now serve most domestic CPU, GPU, and AI chip design enterprises and have established strategic partnerships with leading memory companies. When AI chip design companies are "working overtime to rush production," EDA and IP are the "shovels" in their hands, and demand transmission occurs almost synchronously.
Structural Turning Point in the IP Track
The accelerated development of the IP track is also driven by deep-seated changes in the industrial structure behind it. The global semiconductor IP market size exceeded 9.6 billion USD in 2025, with a CAGR of 15.3% from 2021 to 2025, and is expected to reach approximately 10.4 billion USD in 2026. The growth rate of interface IP has surpassed that of processor IP, becoming the fastest-growing category. It is expected to account for 25% of the entire IP market in 2026 and further expand to 38% by 2029. In the AI era, system performance is determined by the "slowest link." Memory bandwidth and interconnect bandwidth are as critical as computing power, positioning interface IP manufacturers that master key data path technologies at the high end of the power structure.
Meanwhile, UCIe 3.0 (64GT/s) completed its first cross-vendor interoperability test in Q1 2026, moving Chiplet interconnects from specifications to production lines. On July 2, Intel disclosed the XBM patent, replacing the silicon interposer with the UCIe interface and using TFT (Thin-Film Transistor) thin-film transistors to build memory in the back-end-of-line (BEOL) process layer, which could disrupt the HBM packaging paradigm. RISC-V has officially entered its first year of commercialization, with a global market share reaching 25% in 2025, forming a tripartite structure with x86 and ARM. The IP industry is shifting from "who owns the best CPU core" to "who can connect the entire data path from computing to memory to interconnection".
Review of the Key Players in Domestic EDA/IP
Brite Semiconductor
A listed high-tech enterprise providing one-stop custom chip and IP services, offering customers one-stop services from chip specification formulation and architecture design to finished chips, committed to providing customers with high-value, differentiated solutions.
The company focuses on one-stop custom services for system-level (SoC) chips. Custom chips include system main control chips, communication chips, baseband chips, network switch chips, FPGA chips, wireless RF chips, and other key chips. With a complete product matrix layout and industry-leading technical strength, it widely empowers application scenarios such as industrial control, network communication, IoT, consumer electronics, smart cities, and automotive electronics. With top-tier customization capabilities, it accurately matches the differentiated, personalized, and high-end needs of multiple fields, leading the wave of industry technology application upgrades.
Relying on its self-developed ASIC design platform and IP matrix, Brite Semiconductor has created the YouSiP (Silicon-Platform) platform solution and "YOU" series IP, branded to mean "high quality." These have passed complete tape-out testing and verification or mass production across mainstream process nodes, with technological maturity and commercial reliability firmly maintaining an industry-leading level. Among them, the YouSiP solution covers multiple fields such as voice recognition, image processing, communication, IoT, and smart cities. It can provide high-performance prototype design references for system companies and fabless semiconductor companies, significantly shortening product R&D cycles and accelerating market landing processes, helping customers seize industrial opportunities and lead industry development.
PCIe 5.0 IP
Flagship Product
Self-developed PCIe 5.0 IP based on domestic processes, supporting PIPE 5.1/4.4.1/4.3/4.2 interfaces, fully covering PCIe Gen5/4/3/2/1 protocol standards, with a maximum data transmission rate reaching 32Gbps, featuring flexible configuration capabilities and strong scalability. With its superior performance and low-power characteristics, this PCIe 5.0 IP can be widely applied in application scenarios such as servers and data centers, AI and edge computing, high-performance computing, IoT, communication and network equipment, intelligent image processing, consumer electronics, as well as advanced driver-assistance systems (ADAS) and intelligent cockpits in smart vehicles, meeting the high-performance needs in high-speed data transmission and low-power design.
NiuXin Semiconductor
A national-level specialized, refined, differential, and innovation (SRDI) key "Little Giant" enterprise, focusing on the R&D and innovation of high-speed interconnection technologies. It possesses completely independent and controllable intellectual property rights, deeply matching domestic advanced processes and domestic advanced memory. It can provide advanced high-speed interconnection products and services for China's leading enterprises in fields such as AI, high-performance computing, intelligent driving, and high-end equipment, helping them break through technological monopolies.
PCIe 5.0 High-Speed Interface IP with Speeds Up to 32GT/s
Flagship Product
Facing the extreme demand for bandwidth in AI large model training, high-performance computing, and next-generation data centers, the PCIe 5.0 IP independently developed by NiuXin Semiconductor increases the transmission rate to 32GT/s, overcoming the challenges of loss and noise interference in high-speed signal transmission.
This product has completed silicon verification based on domestic advanced processes, integrating high-performance CDR circuits and a complete link equalization scheme (FFE+DFE). Its insertion loss compensation capability, bit error rate, and compatibility indicators all meet protocol standards. Currently, this IP has been adopted by leading domestic chip customers and applied in flagship projects such as AI computing super nodes, data acceleration cards, and high-end SSD controllers, providing an independent and controllable high-speed interconnection solution for domestic high-end computing chips.
Guixin Technology
The company is mainly engaged in the R&D and industrialization of EDA software design for the new generation of 2.5D/3D stacked chips. It solves the "choke point" problems in semiconductors and ICs through 2.5D/3D stacked chip technology, assisting the product upgrade and iteration of the domestic chip design industry. As one of the few domestic enterprises capable of providing full-flow advanced packaging EDA solutions, it independently builds the STCO (System Technology Co-Optimization) core system, creates the 3Sheng Integration 2.5D/3D EDA+ new paradigm, reconstructs the collaborative innovation practice of full-flow design, simulation, and verification for advanced packaging, and provides key support for the autonomous development and industrial upgrading of domestic advanced packaging EDA.
In the process of technological innovation and product R&D, Guixin Technology has obtained the national intellectual property fast pre-examination channel, accumulating over 40 intellectual property applications, including 31 invention patents, 1 utility model patent, and 12 software copyrights, of which 29 invention patents, 1 utility model patent, and 11 software copyrights have been authorized. Relying on solid scientific and technological accumulation and autonomous and controllable stacked chip EDA technology, it has successfully undertaken national and provincial scientific research projects such as the Chiplet EDA platform R&D under the "Advanced Computing and Emerging Software" special project of the National Key R&D Program during the "14th Five-Year Plan," the microsystem architecture design EDA project of the "14th Five-Year Plan" JKWXX (National Defense Science, Technology and Industry Commission), and the advanced packaging EDA software development under the "Chip Design and Manufacturing" special project of the Guangdong Provincial Key Field R&D Program. It has also won national awards such as the Grand Prize in the 2025 New Domain and New Quality Innovation Competition, the Gold Award in the China Youth Chuangqingchun Competition, and the First Prize in the 2025 "Create in Shanghai" International Innovation and Entrepreneurship Competition.
3Sheng Stacked Chip EDA Platform
Flagship Product
The 3Sheng Stacked Chip EDA Platform covers five major centers: system-level architecture design, physical implementation, multi-die test fault tolerance, analysis and simulation, and multi-Chiplet verification, supporting the co-design of "chiplet-interposer-package." It independently builds the STCO (System Technology Co-Optimization) core system, creates the 3Sheng Integration 2.5D/3D EDA+ new paradigm, reconstructs the collaborative innovation practice of full-flow design, simulation, and verification for advanced packaging, and provides key support for the autonomous development and industrial upgrading of domestic advanced packaging EDA.
Julin Technology
A one-stop EDA simulation sign-off solution provider from chip, package to system. With TrueSPICE as the core SID Core technology engine, the company has successively created the one-stop SI/PI simulation platform SIDesigner, the PCB full-board simulation platform ASCENEXT, and the power electronics simulation platform PowerExpert. These have been widely used as sign-off standards in batch production by leading enterprises. Relevant design cases on the client side have continuously proven that Julin's products are fully capable of replacing the industry's sign-off benchmark tools and surpassing similar foreign products in advanced scenarios.
SIDesigner One-Stop SI/PI Simulation
Flagship Product
Julin SIDesigner is a one-stop system SI/PI simulation platform covering chip, package, and board levels with sign-off level accuracy. It is built-in with Golden accuracy True-SPICE and Channel Simulation dual engines (SIDCore). It has been comprehensively tested by multiple industry-leading customers, becoming the accuracy standard for their SI/PI design and development processes.
Innosilicon
Innosilicon is a leading ecosystem-enabling enterprise in China for one-stop IP and chip custom services, and also one of the leading IC R&D enterprises in the country. It possesses core technical strengths in three major fields: computing, storage, and connection. It has a full set of high-speed interface IP, advanced process SoC platform system architecture, and processor core innovative customization capabilities. It provides a full set of high-speed IP cores and chip custom solutions from 55nm to 3nm across major global foundries (TSMC, Samsung, SMIC, GlobalFoundries, UMC, Intel, HLMC).
With 19 years of technical accumulation, Innosilicon is committed to providing customers with one-stop closed-loop supply chain solution services from front-end and back-end design, verification, tape-out mass production, interposer packaging and testing, as well as hardware prototypes and software driver frameworks, helping customers significantly improve product success rates and shorten innovation and development cycles. Innosilicon's IP and SoC services are mainly divided into three major platform application scenarios: high-performance computing, multimedia and automotive electronics, and AIoT. Innosilicon's one-stop platform, with its scenario-optimized IP and SoC experience-enabled business model, is built on hundreds of tape-outs and a solid foundation of thousands of hardware and software engineers. Underlying innovations such as HBM3E, GDDR7/6X/6, UCIe Chiplet, and PCIe5, combined with subsystem custom mass production experience, greatly save customers' workload in developing software and hardware products for large models and other chips. Innosilicon has empowered over 300 well-known global enterprise customers, licensing and customizing the mass production of over 10 billion high-end SoC chips.
Empyrean Technology
Focusing on the development, sales, and related services of EDA tools, it is committed to becoming a full-flow, full-field, and globally leading EDA provider. Its main products include full-custom design platform EDA tool systems, digital circuit design EDA tools, wafer manufacturing EDA tools, advanced packaging design EDA tools, and 3D IC design EDA tools, along with related technical services.
Among them, the full-custom design platform EDA tool system includes full-flow EDA tool systems for analog circuit design, memory circuit design, RF circuit design, and flat panel display circuit design. Technical services mainly include basic IP, wafer manufacturing engineering services, and other related services. Products and services are mainly applied in the fields of IC design, manufacturing, and packaging.
VeriSilicon
The company possesses six categories of independently controllable processor IPs: graphics processing IP (GPU IP), neural network processing IP (NPU IP), video processing IP (VPU IP), digital signal processing IP (DSP IP), image signal processing IP (ISP IP), and display processing IP (Display Processing IP), as well as over 1,700 mixed-signal IPs, RF IPs, and interface IPs.
Based on its proprietary IPs, the company has a rich portfolio of hardware and software chip custom platform solutions for AI applications, covering always-on lightweight spatial computing devices such as smartwatches and AI/AR glasses, high-efficiency edge computing devices such as AI PCs, AI smartphones, smart vehicles, and robots, as well as high-performance cloud computing devices such as data centers/servers.
Primarius Technologies
The first domestic EDA listed company, committed to building application-driven, full-flow EDA solutions covering IC design and manufacturing, supporting the continuous development of various high-end chip R&D, and jointly building a competitive and vibrant EDA ecosystem with upstream and downstream industry chain partners and EDA partners.
On June 26, 2026, Primarius Technologies' acquisition of Ruicheng Xinwei and its controlling Nanengwei was registered and approved by the CSRC. Through the deep integration of the two core industrial foundations of EDA tools and semiconductor IP, Primarius Technologies will comprehensively build an EDA+IP full-chain enablement platform, laying a solid underlying foundation for the autonomous ecosystem of the domestic IC industry.
Ruicheng Xinwei
Ruicheng Xinwei is a leading domestic physical IP player, ranking first in China and tenth globally in the three tracks of analog/mixed-signal IP, wireless RF IP, and embedded memory IP, serving over 500 chip design customers. Nanengwei focuses on high-speed interface IP (SerDes, DDR, PCIe), which is one of the most relied-upon IP categories for AI and high-performance computing chips. After the two are merged into Primarius Technologies, the domestic EDA+IP full-chain platform is officially formed.
Semicentury Software
A leading supplier of IC EDA software and wafer-level electrical test equipment. The company focuses on chip yield improvement and rapid monitoring technology for electrical testing, and is an important partner for many large domestic and international IC manufacturing and design enterprises. The company provides EDA software, PDA software, big data analysis software, circuit IP, WAT electrical test equipment, and a complete set of solutions combined with chip yield improvement technology. It achieves improvements in chip performance, yield, and stability throughout the entire product cycle from IC design to mass production, with successful cases covering multiple IC process nodes.
Hejian (UniVista)
Its product line covers digital chip EDA tools, system-level tools, and high-speed interface IP. It is the only domestic EDA company that can fully cover the full flow of digital chip verification, the full flow of DFT (Design for Testability), and simultaneously provide high-speed interconnect IP for advanced processes. With an innovation speed of over 40 products in five years and hardcore technical strength, Hejian has led the new situation of Chinese EDA enterprise development and ecosystem construction.
Domestic First Agentic AI Self-Developed EDA Platform
Flagship Product
The newly released second-generation digital design AI intelligent platform—the intelligent agent UniVista Design Agent (UDA) 2.0—is the first leading intelligent agent EDA tool in China based on a fully self-developed EDA architecture. It can autonomously complete the full-flow tasks of RTL design, verification, debugging, and optimization after receiving design requirements and guidance from engineering personnel, marking the comprehensive opening of the era of autonomous intelligent agents in domestic EDA. The intelligent agent UDA 2.0 has evolved from "Level 2: Conversational LLM Assistant Tool" to "Level 4: Agent Workflow - Autonomous Designer," deeply integrating large language models (LLMs) with Hejian's self-developed EDA toolchain (including UVS+ software simulation, UVD+ software debugging, UVSYN logic synthesis, etc.), and deeply integrating IC design industry knowledge into the Agentic AI system, achieving one-stop automation from natural language description to high-quality code output in chip design.
Xuanji Xingyuan
A leading domestic provider of wireless connection solutions based on autonomous semiconductor IP, focusing on wireless communication, low-power IoT, satellite communication, and navigation. It is committed to providing customers with platform-based, one-stop chip custom services and RF and analog IP licensing.
Xuanji Xingyuan has mastered the five core technologies of RF chip design, and its chip technical indicators have reached domestic leading and international advanced levels. At the same time, it possesses six key technologies for chip mass production, completing the leap from R&D to mass production.
RF IP can provide high-performance, ultra-wideband, and ultra-low-power RF IP products for application fields such as mobile communication, IoT, and satellite navigation. It includes various low-power RF transceivers, high-performance PLLs, and various function blocks for RF transceiver links.
Ultra-low-power analog IP covers power management, digital-to-analog conversion, clock management, etc. Various analog IPs such as ADC/PLL/RTC/LDO/DCDC/POR have all been verified in multiple process products of different customers, effectively helping customers enhance their competitiveness in markets such as IoT, wearable products, industrial control, smart cities, and automotive electronics with low cost, low power, and high performance.
Providing professional and high-quality chip custom services: Satellite navigation chips support the four major global navigation systems, providing high-precision, multi-mode multi-band, and multi-channel RF transceiver chip design. IoT chips adopt advanced low-power process design, supporting sub-6GHz frequency bands and compatible with various IoT standards. General-purpose chips cover various function block chips for RF transceiver links, PLL chips, broadband RF transceiver chips, and analog chips, which can be applied in various wireless communication fields.
Xinyao Hui
Focusing on the R&D and services of semiconductor high-speed interconnection technology and advanced semiconductor IP, its product line covers mainstream protocols such as PCIe, DDR, HBM, SerDes, and UCIe, providing full-stack solutions from the PHY layer to the controller. The DDR5/4 PHY surpasses the highest speed in the entire industry on related processes. The UCIe D2D solution is compatible with D2D and C2C scenarios, fully adapting to the Chiplet architecture.
Kuixin
A leading domestic IC IP and Chiplet supplier, providing customers with one-stop interface IP and high-speed interconnection solutions to meet the growing chip interconnection and computing power needs in the new industrial wave. In the field of high-speed interface IP, Kuixin has independently laid out products such as HBM, UCIe, LPDDR, ONFI, PCIe, USB, PSRAM, eDP, SerDes, and MIPI, covering 55-5nm process nodes, and assisting computing and storage needs in multiple fields such as AI, data centers, and automotive electronics.
Meanwhile, to cope with current challenges in chip interconnection and vertical application integration, Kuixin has created Chiplet products based on interconnection IP, such as M2LINK, D2D, and ML100 IO Die.
Nuclei System Technology
Focusing on the R&D of RISC-V CPU IP and corresponding platform solutions, it is a representative enterprise in the domestic RISC-V field. It has created four general-purpose CPU IP product lines: N/U, NX/UX, and three vertical CPU IP product lines: NS, NA, NI. Currently, over 300 domestic and foreign officially licensed customers have used Nuclei's RISC-V CPU IP, covering multiple fields such as AI, automotive electronics, 5G communication, network security, storage, industrial control, MCU, and IoT.
Riguan
Focusing on the R&D of digital IC EDA software, it is dedicated to building an exclusive AI-empowered platform adapted to all scenarios of semiconductor design. The company has tackled key core technologies such as constraint sign-off, timing analysis, and physical verification, successfully breaking the long-term overseas technological barriers and industry monopoly. Relying on technological accumulation, it pioneered the chip design process intelligent agent platform, innovatively integrating automated design and AI capabilities. Its products and solutions have been scaled and landed in multiple industry benchmark chip enterprises, assisting the efficient and high-quality development of the industry.
X-EPIC
A high-tech enterprise engaged in the R&D of EDA software tools, strategically laid out around "STCO integrated system design," developing multi-physics engine technologies such as SI/PI/electromagnetic/electro-thermal/stress. With the concept of "simulation-driven design," it provides a full-stack integrated system EDA solution from chip, package, module, PCB board level, interconnect to complete machine system, supporting Chiplet advanced packaging. It is committed to empowering and accelerating the design of a new generation of high-speed, high-frequency intelligent electronic products, and has been widely used in fields such as 5G, smartphones, IoT, AI, and data centers.
Quanxin
A professional high-tech enterprise focusing on the development of software and services for integrated smart manufacturing solutions. Taking industrial software as the carrier, the company deeply carries out industrial chain collaborative cooperation, promoting the deep integration of the industry from point to chain. Through the introduction of emerging technologies such as intelligentization, it exclusively lays out the full flow covering manufacturing industrial software, achieving breakthroughs in the field of smart manufacturing.
Hexinwei
An IP custom enterprise with SoC design experience dedicated to serving Chinese small and medium-sized enterprises. Founded in 2004, it focuses on the R&D and continuous innovation of IP and is the largest domestic mixed-signal IP core R&D enterprise. The company's core technologies are high-speed serial interface technology, audio codec technology, and high-speed AD-DA conversion technology. The high-speed serial interface technology provides speeds up to 12.5Gbps, covering technologies such as USB 3.0, SATA, PCIe, and RapidIO. The audio codec can provide 16-bit to 24-bit high-precision audio conversion, and the high-speed AD provides a bit width of 10bit/12bit, with a sampling rate of up to 200MHz.
......Continuously Updated
※ The above is a partial review of relevant enterprises, in no particular order. Comments are welcome for supplementation (WeChat: global360iot01)
Final Words
The domestic EDA and IP industry is at a critical turning point from "point-by-point breakthroughs" to "systematic construction." Domestic breakthroughs are no longer a substitution competition for single-point tools, but a long-term systematic project involving technological accumulation, ecological synergy, and standard formulation.
In this process, representative enterprises in domestic EDA and IP are becoming the core force. The voting channel for the "8th Hardcore Chip" selection in 2026 is now open, with 500,000 electronic engineers voting online!
Every vote you cast marks a coordinate on the breakthrough path of China's chips.
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