On October 19, the 2026 RISC-V China Summit was held in Shenzhen. Meng Jianyi, Chief Scientist of DAMO Academy, delivered a keynote speech, introducing the latest progress of XuanTie RISC-V processors in architecture innovation, software compatibility, and ecosystem collaboration. Meanwhile, a processor product roadmap targeting autonomous driving and embodied AI was released, propelling XuanTie RISC-V into entirely new fields.
Meng Jianyi pointed out, "For high-performance RISC-V to truly achieve mass production and commercial deployment, it requires not only benchmark processor products but also continuous software and hardware technology R&D and engineering verification, refining it from 'usable' and 'reliable' to 'exceptional performance'."
I. Rapid Development of RISC-V: "Openness" as the Core Competitiveness
According to projections by consulting firm Omdia, the compound annual growth rate of RISC-V chips will reach nearly 50% by 2030, and its share in global chip shipments will hit 25% by 2030, which undoubtedly represents a tremendous growth rate.
There are also several major events in the RISC-V industry in 2026 worth noting:
On January 15, 2026, SiFive successfully launched the integration of NVIDIA NVLink Fusion into data center solutions, bridging the interconnection path between RISC-V CPUs and AI accelerators;
On March 24, 2026, Alibaba DAMO Academy released the new-generation flagship RISC-V CPU IP product XuanTie C950. Based on the latest RVA23 standard, its single-core general-purpose performance exceeded 70 points in the SPECint2006 benchmark test, setting a new global record for RISC-V CPU performance. It is suitable for cloud computing, generative AI, high-end robotics, edge computing, and other fields, achieving industry-leading performance;
On April 23, 2026, RVA23 entered the commercial LTS version, with Ubuntu 26.04 LTS fully supporting RVA23, bringing the unified compatibility baseline into mainstream long-term support distributions;
On May 6, 2026, the RISC-V server-oriented standard RISC-V Server Platform Specification v1.0 was officially ratified and released, unifying boot, operating system, and hypervisor interfaces;
On August 24, 2026, the 32-core 2U server BigSky, based on SiFive P870 core IP, achieved limited deployment, realizing software porting, workload optimization, and system verification.
On October 9, 2026, Beijing ESWIN Computing Technology Co., Ltd. (referred to as "ESWIN Computing") officially listed on the Hong Kong Stock Exchange, becoming the world's "first RISC-V chip stock" and filling the gap in the capital market for this track.
In 2026, the RISC-V Foundation's premium members also welcomed renowned international companies such as Tenstorrent, Microsoft, and GlobalFoundries.
It can be said that the current development momentum of RISC-V is exceptionally strong. Particularly in the Chinese market, RISC-V has developed especially rapidly, leveraging its "open architecture" advantage.
Calista Redmond, Chair of RISC-V International, also pointed out in her opening remarks at the summit that RISC-V has evolved from a simple, elegant, and future-oriented architecture into a globally adopted and highly attractive product choice. She noted that RISC-V is now ubiquitous—driving innovation across AI, low-power IoT devices, and high-performance computing systems, as well as in various markets and continents including consumer electronics, industrial automation, automotive platforms, and communication infrastructure.
Regarding the reasons for RISC-V's immense popularity, she pointed out that "openness" is RISC-V's superpower. Openness eliminates barriers, accelerates trust and creativity, and enables engineers, researchers, and companies of all sizes to innovate without limits. Under RISC-V, innovation is not constrained by a single vision but is collectively expanded by the global community—anyone can contribute, build, and take an idea global. It is precisely this openness that has won the imagination of the entire computing industry.
II. Chip Shipments Based on XuanTie IP Exceed 6 Billion Units
As a leading enterprise in China's RISC-V field, Meng Jianyi, Chief Scientist of DAMO Academy, also introduced XuanTie as an example at the summit: "To date, chip shipments based on XuanTie RISC-V CPU IP have exceeded 6 billion units and are applied in a wide variety of embedded fields."
He pointed out that in the pan-smart terminal field, products based on XuanTie IP are in mass production across various domains such as MCUs, wireless connectivity, display control, audio and video, and security. In the baseband field, some manufacturers are also making attempts. This reflects the development trend of RISC-V gradually moving from the edge to more challenging areas.
In the server field, which demands higher performance and has attracted widespread attention, Meng Jianyi revealed that XuanTie's partners are advancing the mass production of products in areas such as BMC, networking, GPU memory controllers, GPUs, and accelerators. It is expected that server terminal products based on the latest XuanTie 950 will be unveiled next year.
III. Unveiling the Roadmap for Autonomous Driving and Embodied AI
At this summit, DAMO Academy also released a brand-new automotive-grade enhanced product—XuanTie E908A, which is also a new automotive-grade product in the XuanTie product line. It is the first processor product to simultaneously achieve ASIL-B/ASIL-D levels, filling the missing link in XuanTie's hardware product line.
According to the introduction, E908A is based on the E908 platform, with performance leading contemporary competitors by 20%. Its Single-Point Fault Metric (SPFM) exceeds 90% for the first time in the industry, providing a safe and reliable real-time computing foundation for scenarios such as safety islands, domain controllers, and in-vehicle gateways.
Meng Jianyi revealed that next, DAMO Academy will continue to promote the layout of XuanTie CPUs in the fields of autonomous driving and embodied AI. Subsequently, C925A, C930A, and C950A will be launched one after another. It is expected that the comprehensive performance of C950A will be improved by 5 times compared to the first-generation products.
III. Three Major Advancement Directions for XuanTie RISC-V: Higher Performance, Software Compatibility, and Collaborative Innovation
Amid the current AI boom, there is immense demand for various XPUs. Particularly with the rise of agentic AI, customized CPUs are also ushering in tremendous development opportunities. Multiple research institutions and major CPU manufacturers predict that in the era of agentic AI, the CPU-to-GPU ratio in AI servers will shift from the original 1:4/1:8 to 1:1.
Meng Jianyi pointed out that in the AI era, CPUs are becoming increasingly important in the entire task workflow. Especially for agentic AI, tasks on CPUs need to be executed as fast as possible, which presents a huge opportunity for RISC-V. However, at the same time, the performance requirements for CPUs are extremely high, latency must be lower, and the overall cost needs to remain relatively controllable.
He also frankly admitted that the RISC-V industry faces the challenge of phased fragmentation during its advancement: there are numerous mandatory, optional, and extended features in the entire architecture. When entering various applications, everyone hopes to configure a product perfectly suited to the application, resulting in many varieties and hardware platforms. At this current stage, there is indeed a challenge in how to well integrate the entire ecosystem on the new process and software sides. However, he refers to this as "phased fragmentation" and believes that the architecture can be made more unified in the future.
From the perspective of XuanTie RISC-V's future development path, Meng Jianyi stated that the next steps will be promoted from three angles: First, continue to improve hardware performance, ensuring stability, reliability, and good consistency; Second, in terms of software, promote the compatibility of the entire ecosystem and software, make significant contributions to the open-source community, and hope that everyone can obtain RISC-V products with excellent software support; Third is collaborative innovation.
1. Hardware: Continuously Moving Towards Higher Performance
In terms of hardware, XuanTie is one of the earliest teams in China to work on RISC-V and already has very stable IP coverage. For example, the XuanTie 925, XuanTie 930, and XuanTie 950 series have SPECint2006 scores of 12, 17, and 22 points respectively. From a performance perspective, they can fully cover various applications.
Meng Jianyi revealed that the next phase of tasks for XuanTie RISC-V will still focus on high performance: single-core performance will reach over 10 points; AI performance will increase by 10 times; and the performance of automotive-grade products in the vehicle field will also be improved by 5 times compared to existing products.
In addition to improving single-core performance, DAMO Academy has also launched the high-performance multi-core interconnect product XT-LINK to continuously enhance XuanTie's multi-core performance and optimize actual workload performance. According to data released by DAMO Academy, the efficiency of XuanTie C950 can be maintained at around 78% in a 128-core configuration. In terms of AI software optimization, facing four types of agentic AI workload scenarios, the comprehensive performance of the multi-core XuanTie C950 system leads x86 competitors by approximately 11%.
On the other hand, to continuously enhance competitiveness in the AI field, DAMO Academy is also striving to build the XuanTie architecture into a native XPU architecture. In the past, CPUs often relied on external NPUs or accelerator cards for AI acceleration, which faced bottlenecks in data movement. DAMO Academy's approach is to make AI computing capabilities a native feature of the CPU, driven by a dual-path of P-Core (Performance Core) / E-Core (Efficiency Core). This not only adapts to large models (unified training and inference) but also supports dedicated acceleration with extremely high flexibility. This has also further improved its performance in running cloud-based MoE and edge-side Dense models. For example, for Qwen3.8-Flash-Next released in August this year, the inference speed reaches 43 tokens/second.
In his speech, Meng Jianyi also explained the technical foundation behind XuanTie's ability to "provide a very complete set of native XPU solutions":
In terms of AI COMPUTE FABRIC, XuanTie CPU natively supports scalar, vector, and matrix (tensor) operations, capable of efficiently handling complex operators in large models, with typical operator utilization greater than 80%;
In terms of MULTI-LEVEL MEMORY, XuanTie CPU supports the SRAM-SLC (System Level Cache) - DDR multi-level cache architecture, supporting DMA asynchronous transfer, hardware-level primitive synchronization, and low-precision mixed-precision computing. This can greatly alleviate the "memory wall" problem in large model inference, achieving memory bandwidth utilization greater than 90%;
In terms of SFU HOTSPOT ACCEL, XuanTie CPU has conducted targeted optimizations for several highly compute-intensive nonlinear operators in the Transformer architecture—Softmax, Norm, and RoPE—improving the computing performance of these operators by 2 to 10 times.
2. Software Ecosystem: Ranked Second in GCC Contributions, 111 Patches Contributed to LLVM, and 48 Patches Contributed to OpenJDK
In terms of software, DAMO Academy's XuanTie CPU has made significant progress. Meng Jianyi stated that in GCC (GNU Compiler Collection) contributions, DAMO Academy has provided 43 patches to the GCC community, covering six types of RISC-V compilation optimization technologies, including register allocation cost models, branch strategies, instruction fusion, vector instruction cost models, TLS access, and loop unrolling.
Meng Jianyi emphasized that DAMO Academy's share of community contributions now reaches as high as 17.5%, ranking second only to Qualcomm (34.6%). These patches are beneficial to all RISC-V processors and can bring about a 10% typical performance improvement. Many customers hope to obtain products on the GCC mainline when RISC-V chips are mass-produced.
In terms of LLVM (a collection of modular and reusable compiler and toolchain technologies), the DAMO Academy XuanTie team has also built its own toolchain and has contributed 111 patches to the LLVM community, achieving a 20% performance improvement compared to the community LLVM version.
Meng Jianyi revealed that recently, AI-oriented extension descriptions were also provided to customers and partners. Everyone can define their own AI instructions based on this architecture and better develop their own AI compilers.
In addition, for RISC-V to enter the server and data center markets, besides meeting the high-performance requirements of hardware, there are also many software issues that need to be resolved. Among them, support for Java is quite critical. The core reason is that Java carries the absolute main workload of enterprise-level backends and cloud-native infrastructure. Without a mature Java runtime, RISC-V servers cannot run real production businesses.
According to Meng Jianyi, over the past six months, DAMO Academy and the Institute of Software have collaborated to contribute 48 patches to OpenJDK (a free and open-source implementation of the Java Platform, Standard Edition), with a contribution share as high as 56.47%. This has also enabled the SPECjbb performance of XuanTie C950 to improve by 31%, achieving a transition from "able to run" to "able to bear the load" in server applications. In addition, DAMO Academy also collaborated with the Dragonwell team to release a Java runtime for Alibaba's e-commerce business, realizing a real business closed loop.
At the operating system level, in addition to the adaptation of numerous open-source systems, DAMO Academy is also continuously promoting the cooperation between XuanTie CPU and commercial operating systems. For example, DAMO Academy has launched commercial operating systems with Ubuntu, Alibaba Cloud, and Kylin.
"With a stable commercial operating system, the next step will be to promote the adaptation of office applications and various apps," Meng Jianyi emphasized. "App adaptation is very important for RISC-V. For a long time in the past, we have been exploring at the underlying operating system level, but in reality, to truly enter mass production, we still need to match these applications."
3. Open Collaboration
As Calista Redmond, Chair of RISC-V International, pointed out earlier, "openness" is RISC-V's superpower, which eliminates barriers and accelerates trust and creativity. It is precisely because of the "open" characteristic of RISC-V that collaboration across the entire industry has been promoted.
Meng Jianyi also pointed out that the practical path of RISC-V originates from scientific research innovation, is achieved through industrial practice, and thrives on open collaboration. Therefore, open collaboration is a very critical key point for RISC-V.
In terms of frontier exploration of RISC-V CPU architecture, DAMO Academy has carried out joint SMT exploration with the Open Chip Institute and ZTE Microelectronics. So far, the three parties have initially completed the first phase of work, achieving a 35% performance improvement on SMT2, namely XuanTie C950. DAMO Academy also participates in the construction of the Ruyi community by the Institute of Software, Chinese Academy of Sciences, and promotes software adaptation related to the matrix computing AME instruction set extension with more than 20 domestic and international institutions.
In addition, DAMO Academy also plans to carry out collaborative innovation with partners from a more in-depth perspective to fully exploit inter-thread parallelism. For example, regarding RISC-V's multi-threading, exactly how many threads should be adopted and how many threads are most suitable for a specific application—this is also a path to be explored in the future.
Meng Jianyi predicts that by 2028, the total SPECint2026 performance of RISC-V single-core multi-threading will exceed 100 points. "Now everyone is still talking about RISC-V's performance, but once SPECint2026 exceeds 100 points, performance will no longer be an issue. More focus will be on how to do it and how to implement it for specific application scenarios."
In addition, DAMO Academy continuously contributes standard technologies to RISC-V International and has contributed ecosystem development boards to the global RISC-V software ecosystem initiative "RISE" (RISC-V Software Ecosystem), promoting the adaptation and optimization of rich edge-side software. For example, in RISE, the DAMO Academy XuanTie team collaborates with foundation members to deeply participate in building the optimization of RISC-V edge-side software performance and compatibility. RISE is a software ecosystem project led by RISC-V International, jointly established with global giants such as Google, Intel, Qualcomm, and Red Hat. Its core goal is to solve the software shortcomings of RISC-V from "able to run" to "easy to use and mass-produced."
According to the introduction, the DAMO Academy XuanTie team has launched a cloud cluster of 20 boards named A210 (typically hardware development boards based on XuanTie cores) to host AOSP (Android Open Source Project) daily builds and CTS/VTS regression tests. Currently, more than 5 patch sets have been successfully merged into the upstream mainline; 9 major modules are READY, and the full-line code for AOSP @ RVA23 (Android 15/16 strongly relies on this specification) has been completed, meaning the link from boot to compatibility certification has been established.
It can be said that the DAMO Academy XuanTie team is deeply collaborating with global software ecosystem partners to ensure the stable operation, reliable performance, and mass production of the RISC-V open architecture on the edge side.
In terms of cooperation with universities and research institutions, DAMO Academy is also cooperating with 10 top domestic universities, inviting university teachers to use XuanTie products in their courses and research. Moreover, DAMO Academy is also promoting cooperation between these universities and RISC-V International, as well as international partners.
Conclusion:
Currently, RISC-V has long surpassed the primary stage of "whether it can be used" and is advancing into the deep waters of "easy to use, reliable, and exceptional performance" at an unprecedented speed. The XuanTie IP with shipments exceeding 6 billion units, the record-breaking single-core performance of C950, and the XPU architecture natively supporting AI large models have built the hardware confidence for RISC-V to pioneer server and agentic AI applications.
However, meeting RISC-V hardware specifications is merely a stepping stone; the software ecosystem is even more critical and requires continuous investment. Facing the inevitable "phased fragmentation" challenge in the advancement of the RISC-V industry, DAMO Academy has chosen a difficult but correct path: from building core RISC-V CPU IP, to underlying GCC and LLVM compilers, to OpenJDK as the cornerstone of server applications, and further to deep adaptation of operating systems, DAMO Academy is continuously leading and solidifying the software and hardware foundation of RISC-V.
At this crossroads where AI is redefining computing architecture, RISC-V is reshaping the landscape of the global computing industry with its architectural openness and flexibility. By being a contributor to the RISC-V mainline, an aligner of standards, and a builder of underlying software, DAMO Academy is breaking the curse that RISC-V can only revolve around the IoT edge, and truly stepping into the vast, high-value markets that require high performance, AI-native capabilities, and operating system and software ecosystem support, such as smart terminals, automotive, embodied AI, and servers.
"Today, the industry has proven that RISC-V is an advanced technology—classic, efficient, open, and scalable, which is widely recognized. However, making good products with it still faces a significant gap. The solution to bridge this gap is for everyone to work together to create highly competitive products in segmented markets. XuanTie will collaborate with partners to jointly refine stable and reliable IP, create a batch of outstanding products, and promote the development of the RISC-V ecosystem," Meng Jianyi concluded.
Editor: Zhihuixun - Langkejian