Author: Liuqian
In August 2026, Google and Honor almost simultaneously unveiled their trump cards for the next generation of AI smartphones.
The Google Pixel 11 is powered by the Tensor G6, with the official claim that it is "not just building a faster chip, but an engine built for a purpose": TPU computing power has increased by 50%, on-device AI tasks are up to 3.5 times faster, and power consumption is reduced to approximately one-third of the previous level. On the hardware front, Honor's Robot Phone features a gimbal camera, while on the software side, it collaborated with Alibaba's Qwen large model to co-create an on-device large model solution. Its YOYO assistant can continuously execute complex tasks involving over 100 steps, introducing the Agentic OS.
As the new smartphone launch wave kicks off in August and September, how will smartphones step into the AI era?
Let us rewind the story of smartphone computing power to nine years ago. In 2017, Huawei's Kirin 970 and Apple's A11 introduced the first NPU in smartphones in the same month. Back then, smartphone chipmakers had to answer the question: what exactly should computing power be used for? Options included computational photography, Face ID, or voice assistants. However, since no killer app emerged, the TOPS (Tera Operations Per Second) of smartphone chips could never become the primary selling point for smartphones.
In 2023, generative AI made computing power a buzzword in the tech industry. In 2025, AI agents developed rapidly, and Physical AI emerged as a crucial direction for industry development, with smartphones serving as a key carrier for Physical AI. The surging demand for computing power driven by AI has brought smartphone processing power back to center stage. Real-world tests demonstrate that computing power significantly impacts the user's AI experience. For instance, when running Gemma 4 on a vivo Y500 Pro, users had to wait 2.8 minutes for a 500-word response, experienced no response for 5 minutes during image recognition, and the app completely froze. Consequently, many users, once the initial novelty of their AI smartphones wears off, immediately go to the settings and disable most on-device AI features. It is foreseeable that as smartphones enter the AI era, smartphone chips will reignite the performance race.
01. Smartphone Chips Begin to Optimize for AI
To accommodate AI demands, the NPU in smartphones is evolving from a general-purpose inference accelerator into a processor tailor-made for Transformer/MoE (Mixture of Experts) architectures. This trend aligns with the emergence of AI inference cards, where the design logic shifts from "general-purpose performance" to "model-awareness," enabling the chip to understand the model and vice versa.
Apple has integrated an AI accelerator into the GPU of the A19 Pro. LLM/Diffusion inference can simultaneously leverage three parallel engines: GPU computing units, NA matrix units, and the 16-core Neural Engine (NE). When the iPhone 17 Pro continuously runs large models (such as the on-device 3B LLM for Apple Intelligence), it can maintain an inference speed of over 30 tokens per second (tok/s).
From its underlying architecture design to hardware-software co-optimization, the Google Tensor chip is deeply customized around On-Device AI and high-performance, low-power inference. The TPU is optimized for the matrix multiplication and accumulation operations (GEMM) at the core of neural networks, enabling data to flow directly between computing units, reducing the frequency of RAM access, and improving energy efficiency. It natively supports low-precision data formats such as INT8, FP16, and BF16, significantly reducing memory bandwidth usage and power consumption with minimal precision loss. Addressing the attention mechanism of the Transformer architecture, it incorporates high-speed on-chip SRAM cache and high-bandwidth memory scheduling to lower the Time to First Token (TTFT) latency and continuous output power consumption for on-device generative AI.
Qualcomm integrates scalar, vector, and tensor accelerators into a single NPU, reducing data transfer latency between different acceleration units. It breaks down neural network layers into micro-tiles and deeply fuses them (supporting the simultaneous fusion of over 10 layers), minimizing frequent read/write operations to external DRAM. This allows intermediate data to be processed directly on-chip, significantly lowering power consumption. Furthermore, a large-capacity on-chip shared high-speed cache is embedded within the NPU to provide high-bandwidth support for Large Language Models (LLMs) and Vision Transformers (ViT), reducing the power drain caused by memory access.
As chip design begins to revolve around models, the relationship between chipmakers and model providers has also evolved. Some chip companies have established ecosystem-level partnerships with large model providers. For instance, MediaTek deployed the StepFun ACE-Step music model onto the Dimensity 9500 platform via on-device visual deployment, significantly boosting the porting efficiency of models and algorithms. Naturally, companies like Google, which possess their own Gemini large models, have secured a first-mover advantage in smartphone AI.
Hardware-software co-optimization is particularly critical in the AI era. A 7B model (FP16, 14GB) requires reading all its weights to generate just 1 token. With a bandwidth of 67–85GB/s, the theoretical upper limit is only about 5 tok/s (calculated purely based on the bandwidth formula, without relying on any third-party computing power estimates). Assuming unchanged bandwidth and chip design, if the weights are compressed from 2 bytes to 0.5 bytes, shrinking the model to approximately 3.5GB, reading it once yields a theoretical speed of about 19 tok/s (67GB/s ÷ 3.5GB ≈ 19 tok/s), which is roughly a 4x increase. Achieving this requires the chip to natively support INT4/INT2/FP8 computation, meaning the chip must have dedicated computing units to deliver the speed. However, quantization has its limits; compressing below INT4 results in precision loss that becomes visibly apparent. In many cases, current smartphones lack not computing power, but are bottlenecked by memory.
02. The Memory Wall: A Hurdle Smartphones Cannot Overcome
Computing power is just one aspect of the AI smartphone experience. Even with an abundance of transistors, channel limitations restrict the speed at which computing power is delivered to the user.
Why is it said that smartphone chip computing power is sufficient? Someone attached two external CPU coolers to a smartphone powered by the Snapdragon 8 Elite and ran The Witcher 3 at 1080p ultra settings, achieving 20 to 30 FPS with GPU utilization maxed out at 99%. This clearly demonstrates that the raw computing power of smartphone chips is already adequate for PC-level tasks. However, in AI inference scenarios, raw computing power is not the sole focus for improving the AI experience. The method by which large models generate text is called "autoregressive decoding"; for every single token generated, the entire model's weights must be read from start to finish. This means generation speed relies heavily on memory bandwidth, not merely on the number of computing units in the processor.
Regarding memory enhancements, MediaTek's Dimensity 9500 introduces a Processing-in-Memory (PIM) NPU. Both Google and Qualcomm, as mentioned earlier, have implemented optimizations to boost memory access speeds.
In July 2025, JEDEC released the LPDDR6 standard. While LPDDR5X scaled from 8.5Gbps to 10.7Gbps with bandwidth increasing from 51GB/s to 85GB/s, LPDDR6 shows significant improvements in both performance and energy efficiency compared to the previous LPDDR5X standard. Its data throughput capacity has increased by 33%, with a single-pin transfer rate reaching up to 14.4Gbps, and its memory power consumption is reduced by over 20% compared to the previous generation. Currently, SK Hynix has officially announced its LPDDR6 products, which are manufactured using the 6th-generation 10nm-class (1c) process technology, offering a single-chip capacity of up to 16GB.
Much like the significance of HBM in the AI era, before the mass production of LPDDR6 and the maturation of Processing-in-Memory (PIM) technologies, it remains difficult for on-device AI performance to achieve a qualitative breakthrough. Although LPDDR6 is on the horizon, true large-scale commercialization will take time. The primary reason is that current memory prices are already exceptionally high, and the new standard will drive costs up even further, directly impacting retail prices and hindering shipments. Therefore, for smartphone memory bandwidth to leap from 85GB/s to a level capable of smoothly running large models, it requires not only technological breakthroughs but also a cooling down and stabilization of the memory market.
03. Ripple Effects in the Supply Chain: Storage Price Hikes, Capacity Squeeze, and Model Fees
For consumers, the cost of smartphones entering the AI era is already becoming apparent.
Memory storage is the first segment to feel the impact. Original memory manufacturers are collectively shifting focus to HBM and DDR5, significantly slashing DDR4 capacity, while the share of LPDDR5 is projected to rise to 73% in 2026. Smartphones are being forced to upgrade: 12GB has become the "baseline" for AI smartphones, 16GB LPDDR5X is now standard for flagship models, and some devices are pushing up to 24GB. TrendForce's latest smartphone industry research indicates that the escalating costs of components, led by memory, are expected to substantially drive up the production costs for Apple's next-generation iPhone 18 series. The Bill of Materials (BOM) cost for the 256GB version is projected to increase by approximately 38% year-on-year. Furthermore, while memory accounted for about 10% of the total cost in 2025, it is expected to surpass 40% in the first half of 2027.
Advanced process nodes are being squeezed, leading to higher costs for smartphone processors. TSMC (Taiwan Semiconductor Manufacturing Company) has raised its full-year capital expenditure for 2026 to between $60 billion and $64 billion, hitting a record high, while also notifying customers of price hikes for the 7nm node and below. AI accelerators are consuming the majority of N3 capacity, leaving smartphone chip clients like Qualcomm and MediaTek facing capacity constraints at advanced nodes. Furthermore, CoWoS advanced packaging is prioritizing supply for AI chips, indirectly driving up overall foundry costs.
Model providers are now taking a seat at the table. Both consumers and smartphone OEMs require model providers to develop "small models" better suited for on-device deployment, effectively inserting another middleman between the consumer and the smartphone manufacturer. Acting as the integrator, the smartphone OEM can decide which model to use, which features run on-device versus in the cloud, and how to allocate memory and thermal budgets. Consequently, the market is witnessing smartphone OEMs beginning to develop their own models, a strategic choice clearly driven by the desire for greater bargaining power.
Currently, the penetration of AI smartphones is primarily driven by the "passive popularization" of flagship models that come standard with AI capabilities. The appeal of smartphone AI to users is not yet strong enough, revealing a chasm between early adopters and the mass market for this new technology. Although smartphone processor manufacturers claim that on-device AI can protect local privacy, a hybrid on-device and cloud approach remains the industry consensus for the overall AI experience today. Whether for AI PCs or AI smartphones, no mainstream manufacturer has pursued a purely on-device route; the value of on-device privacy and low latency has yet to translate into a clear willingness among users to pay for it. For smartphone AI, the industry must confront the most fundamental question: will consumers voluntarily pay a premium to upgrade their phones specifically for AI features?
In terms of user experience, the most noticeable benefits are still confined to "icing on the cake" scenarios such as photo editing, translation, and summarization; truly imagination-breaking designs remain absent. AI smartphones lack an "iPhone moment," a "ChatGPT moment," and even a "DeepSeek moment." Although the official roadmaps of various manufacturers list "AI agents" as a key focus for the next generation, this also highlights that the threshold for integrating agents seamlessly with smartphones has not yet been crossed. If crossed, AI is expected to become a genuine driver for smartphone upgrades; if not, on-device AI will remain merely a marketing label for high-end devices for the foreseeable future.
Until LPDDR6 reaches mass production and the memory market cools down, there will be no window for price reductions on AI smartphones.