Author: Junxi
Broadcom is arranging over USD 50 billion in financing for custom AI chips for OpenAI, with negotiations still in the early stages. Less than a week ago, a financing arrangement of up to USD 42 billion between Anthropic and Broadcom was just disclosed to pay for TPU computing power leasing. Two leading model companies, one advancing in-house development and the other expanding the leasing of custom computing power, have both linked tens of billions of dollars in financial arrangements to ASIC deployment.
Recently, major orders have also emerged on the design front: Synopsys signed a multi-year IP agreement with Amazon worth over USD 1 billion, and SEMIFIVE secured a USD 52 million order for AI inference ASIC development. On October 6, Marvell raised its revenue target for custom chip business in fiscal 2029 to over USD 12 billion. Customers' investments in custom computing power are expanding from main accelerators to design services, IP, and supporting chips.
An industry research report released in late September even projected that in the high-end cloud AI accelerator market in 2027, ASIC shipments in terms of unit volume will surpass those of GPUs. Major GPU customers are still purchasing existing products while simultaneously increasing their investments in in-house chips and custom computing power. Major customers are gaining deeper control over chip definitions while entrusting design implementation, IP, and mass production to specialized companies. The orders suppliers are competing for are now covering more stages of the customer journey, from developing in-house chips to deploying computing power.
01 Beyond Major Customers, the Buyer Pool is Expanding
The arrangement between Anthropic and Broadcom corresponds to a committed computing power expenditure. Documents disclosed on October 1 show that Anthropic's five-year TPU computing power leasing commitment is approximately USD 125.2 billion, and the financing facility of up to USD 42 billion can cover about one-third of it. Broadcom or its designated financing partner will provide funds in the form of convertible debt, and Anthropic expects not to issue the relevant notes before the completion of its IPO. The facility does not equal cash already spent by Broadcom, but it extends the relationship between the two parties beyond mere chip supply and procurement.
This batch of computing power utilizes TPUs jointly developed by Google and Broadcom. In April this year, Anthropic announced that it will receive several gigawatts of new TPU computing power starting in 2027. The current financing arrangement provides a funding pathway for deployment. For Google, TPUs are extending from serving internal business to meeting the large-scale demands of external model companies, thereby expanding shipment volumes; Anthropic can increase its use of ASIC computing power without needing to complete its own chips first.
On the other end, independent accelerator companies have also found new buyers. On September 29, Cerebras and General Compute announced the signing of a multi-year agreement, under which the latter will purchase, deploy, and operate Cerebras systems, and then sell dedicated inference computing power to customers, with services expected to begin in the first quarter of 2027. The first application direction is coding agents: such programs require continuous model calls to complete planning, coding, testing, and modification, and the wait time for a single inference accumulates throughout the entire task.
General Compute previously secured a USD 400 million debt financing facility from Upper90. This money is not the amount of this chip contract, but it illustrates that new types of cloud service providers are taking on hardware financing and operations, allowing downstream inference service providers to purchase computing power without having to own the entire set of equipment themselves. Independent chip manufacturers thus gain an additional pathway to enter the market, without needing every application company to become a direct hardware purchasing customer.
Just a day earlier, Cerebras also announced a 100 MW inference computing power deployment plan with Gimlet Labs, with the first joint data center expected to go online later this year. Gimlet operates an inference platform that includes multiple types of chips. The two parties have previously collaborated to take on customers' private inference tasks, and the new deployment is still being advanced. Two consecutive partnerships have brought dedicated accelerators into the cloud service channel, also indicating that market expansion does not rely solely on proprietary chip systems like those of Google and Amazon.
Industry research released in late September predicts that in 2027, shipments of high-end cloud AI accelerators will reach approximately 25.95 million units, of which ASICs will account for about 15.26 million units, a year-on-year growth of approximately 111%, with a share of nearly 60%. However, this metric measures the number of chip units and cannot be extrapolated to mean that ASIC revenue or computing power will surpass that of GPUs. In the same forecast, NVIDIA-related shipments will still grow by about 18%. When new demand is large enough, both architectures can scale up simultaneously.
The large-scale deployment of TPUs is still driven by a few customers, while new partnerships for independent accelerators must go through data center onboarding and customer migration. Financing and long-term agreements bring future demand into the chip supply chain earlier, but whether this can form sustained procurement also depends on whether downstream services can absorb this computing power.
02 From Chip Design to Undertaking Practical Applications
OpenAI is advancing its in-house development route to the deployment stage. In late September, hardware head Richard Ho stated in an interview that Jalapeño will first meet OpenAI's own computing power needs, and external sales are not currently a priority. System details disclosed on October 2 show that this in-house accelerator has chosen AMD's EPYC Turin as the host CPU.
News disclosed on October 7 further revealed that Broadcom is arranging over USD 50 billion in financing for the custom AI chips jointly developed by the two parties, and has been in discussions with institutions such as Apollo and BlackRock.
According to the announced division of labor, Broadcom is responsible for chip implementation and network-related work, while Celestica participates in board and rack system integration. Model companies design accelerators around their own businesses while continuing to use mature CPU and specialized system supply chains. The expansion of the in-house scope does not require redeveloping every aspect of the server.
When evaluating Jalapeño, OpenAI compares inference energy efficiency under the same response speed requirements and takes reducing data movement as an important design direction. Mastering the model, software, and actual invocation requirements enables it to adjust the architecture around the changes in computation and memory access during the inference process.
Ho also emphasized that Jalapeño is programmable and capable of running different models, with previous tests including open-weight models such as DeepSeek and Kimi. Jalapeño does not permanently hardwire a specific model onto the silicon, but supporting new model families still requires developing compute kernels and continuous optimization.
On September 25, Amazon announced a specific adaptation case. The real-time interactive AI platform Reactor collaborated with the AWS Neuron team to run the video generation model Rolling Forcing on a single Trainium2 chip, achieving real-time generation of over 16 frames per second. Unlike generating a complete video at once, such applications require continuous frame output and response to user input, with latency requirements spanning the entire generation process.
The team developed dedicated compute kernels for data size variations, memory access, and cache management, and rearranged the execution of the model across the cores on the chip. This achievement did not provide figures for large-scale commercial deployment, nor can it be directly translated into a cost advantage over GPUs, but it demonstrates the work required for ASICs to enter new applications: chip manufacturers must work with model and platform developers to address bottlenecks in actual operation to turn paper performance into usable services for users.
The partnership between Gimlet and Cerebras, on the other hand, chooses to use a combination of different chips. Gimlet's platform can allocate tasks by inference stage, allowing GPUs and Cerebras systems to each take on suitable work, and then provide services through a unified interface. For application developers, dedicated accelerators can be added at the underlying layer without having to migrate the entire service out of the original GPU system at once. What dedicated chips win might first be a segment of the inference process, rather than an entire cluster.
According to OpenAI's previously announced arrangements, Jalapeño is planned to begin deployment at the end of the year, and the company has also made it clear that it will continue to use accelerators from NVIDIA and other partners. From in-house chips and cloud adaptation to heterogeneous deployment, recent projects are all arranging hardware around specific tasks. The change faced by GPU suppliers is that customers have more allocation methods for their next round of procurement; ASIC manufacturers, on the other hand, need to prove that they can continuously undertake these businesses, rather than just completing a one-time performance demonstration.
03 Design Services and IP Secure New Orders
On September 29, SEMIFIVE announced that it signed an approximately USD 52 million AI inference ASIC development contract with an unnamed US fabless chip company. This is its largest single contract to date, and also its first project in North America undertaken in a model where the customer delivers requirement specifications and the supplier takes over subsequent development.
The customer provides product requirements and performance targets, and SEMIFIVE is responsible for detailed chip design, software, packaging, testing, and mass production. Compared to the model where the customer completes the main design and the service provider then assists in implementation, the supplier intervenes earlier and assumes more comprehensive responsibilities. Enterprises lacking sufficient engineering teams can retain control over product usage and performance targets, entrusting the implementation work to specialized companies.
This inference chip will adopt LPDDR6 memory and a PCIe interface. Design goals include reducing memory power consumption and total cost of ownership, with tape-out planned for the first half of 2027 and mass production in 2028. There is still a long time from contract to shipment; what the design service provider gets is not only an order but also the responsibility for subsequent verification, manufacturing, and delivery.
On September 30, Synopsys announced a multi-year agreement with Amazon worth over USD 1 billion, focusing on chip IP optimized for specific applications. IP consists of reusable chip design modules, so cloud vendors do not have to develop all modules from scratch and can allocate more of their own resources to the architecture and software that determine product differentiation.
Synopsys explicitly stated that this collaboration will drive its IP business to adopt a model of license fees plus volume royalties. Compared to charging fees only during the design phase, suppliers have the opportunity to continuously generate revenue as customers' chip volumes scale up. The agreement did not disclose specific product allocations, and Amazon's custom chips cover applications such as general-purpose computing, AI, and networking, so this USD 1 billion cannot be entirely regarded as orders for AI inference chips.
On October 6, Marvell raised its guidance, demonstrating another portion of incremental growth. The company increased its revenue target for the custom chip business in fiscal 2029 to over USD 12 billion. Management explained that the upward revision mainly comes from supporting chips for accelerators, involving multiple customers and multiple projects, rather than a single main chip for a single customer. The custom opportunities it listed include network interfaces, security, memory expansion, storage, and inference offloading.
As accelerator systems expand, standard components may not fully match the bandwidth, network configuration, and management functions required by customers, prompting cloud vendors to incorporate more peripheral designs into customization. Relying on the IP of its existing network, storage, and other products, Marvell provides semi-custom or custom designs according to customer requirements. Beyond the main accelerator, the same system is generating more design projects.
This also explains why IP providers and design service providers can still secure orders simultaneously when in-house investments expand. What customers most want to master is product definition, architecture, and software, and they may not be willing to build complete teams for every interface or management chip. However, supporting chip revenue and high-end AI accelerator shipments belong to different metrics, and Marvell's upward revision cannot be directly used as evidence of a proportional increase in demand for main ASIC chips.
Currently, the growth of ASICs is simultaneously expanding the buyer pool and the division of labor among suppliers. Model companies are gaining deeper control over product definitions, new cloud service providers are taking on deployment, and specialized manufacturers are undertaking more design and mass production tasks. After the mega-orders, only solutions that can go online on schedule, continuously adapt to models, and secure next-generation orders will translate this round of investment into stable market share.